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authorPokechu22 <Pokechu022@gmail.com>2021-07-31 13:06:57 -0700
committerPokechu22 <Pokechu022@gmail.com>2021-07-31 13:18:07 -0700
commitf3f466ae821806d8f23fdcac05d613e6404e090b (patch)
tree016345e96c8e12bbf2b811f1f0d9c37324a7b4bb /Source/Core
parentd4cd28929701830af3613df6bbaac8c99bc943df (diff)
DSPDisassembler: Fix LSR/ASR formatting
Originally, 1479 (for example) would disassemble as `lsr $ACC0, #-7`. At some point (likely the conversion to fmt), this regressed to `lsr $ACC0, #4294967289`. Now, it disassembles as `lsr $ACC0, #7`.
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/DSP/DSPDisassembler.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/Source/Core/Core/DSP/DSPDisassembler.cpp b/Source/Core/Core/DSP/DSPDisassembler.cpp
index db622ef32a..1a40c4b8bb 100644
--- a/Source/Core/Core/DSP/DSPDisassembler.cpp
+++ b/Source/Core/Core/DSP/DSPDisassembler.cpp
@@ -105,8 +105,9 @@ std::string DSPDisassembler::DisassembleParameters(const DSPOPCTemplate& opc, u1
// LSL, LSR, ASL, ASR
if (opc.params[j].mask == 0x003f)
{
- // 6-bit sign extension
- buf += fmt::format("#{}", (val & 0x20) != 0 ? (val | 0xFFFFFFC0) : val);
+ // Left and right shifts function essentially as a single shift by a 7-bit signed value,
+ // but are split into two intructions for clarity.
+ buf += fmt::format("#{}", (val & 0x20) != 0 ? (64 - val) : val);
}
else
{