summaryrefslogtreecommitdiff
path: root/Source/Core
diff options
context:
space:
mode:
authorRyan Houdek <Sonicadvance1@gmail.com>2013-03-08 10:52:04 -0600
committerRyan Houdek <Sonicadvance1@gmail.com>2013-03-08 10:52:04 -0600
commitf6d45ea4617515aa91a60e27c00a2902b1c81b18 (patch)
tree1df5b507032699f5561c76bc58d771de24cbe307 /Source/Core
parentbe217bf0966e75891e931c63be469d844e3e7713 (diff)
Fix a potential issue when someone has a CPU core that isn't available on that host set in the INI file, it would just fail out. Now it defaults to interpreter.
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/Src/PowerPC/JitInterface.cpp1
-rw-r--r--Source/Core/Core/Src/PowerPC/JitInterface.h3
-rw-r--r--Source/Core/Core/Src/PowerPC/PowerPC.cpp9
3 files changed, 9 insertions, 4 deletions
diff --git a/Source/Core/Core/Src/PowerPC/JitInterface.cpp b/Source/Core/Core/Src/PowerPC/JitInterface.cpp
index 8fcdd9837f..2f56f013be 100644
--- a/Source/Core/Core/Src/PowerPC/JitInterface.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitInterface.cpp
@@ -81,6 +81,7 @@ namespace JitInterface
default:
{
PanicAlert("Unrecognizable cpu_core: %d", core);
+ jit = NULL;
return NULL;
break;
}
diff --git a/Source/Core/Core/Src/PowerPC/JitInterface.h b/Source/Core/Core/Src/PowerPC/JitInterface.h
index a01c3dfa6e..9213072ab9 100644
--- a/Source/Core/Core/Src/PowerPC/JitInterface.h
+++ b/Source/Core/Core/Src/PowerPC/JitInterface.h
@@ -51,6 +51,3 @@ namespace JitInterface
extern bool bFakeVMEM;
extern bool bMMU;
-#ifdef _M_ARM
-#include "JitArm32/Jit.h"
-#endif
diff --git a/Source/Core/Core/Src/PowerPC/PowerPC.cpp b/Source/Core/Core/Src/PowerPC/PowerPC.cpp
index d4447331e7..e65b310f5a 100644
--- a/Source/Core/Core/Src/PowerPC/PowerPC.cpp
+++ b/Source/Core/Core/Src/PowerPC/PowerPC.cpp
@@ -161,13 +161,18 @@ void Init(int cpu_core)
switch (cpu_core)
{
- case 0:
+ case 0:
{
cpu_core_base = interpreter;
break;
}
default:
cpu_core_base = JitInterface::InitJitCore(cpu_core);
+ if (!cpu_core_base) // Handle Situations where JIT core isn't available
+ {
+ WARN_LOG(POWERPC, "Jit core %d not available. Defaulting to interpreter.", cpu_core);
+ cpu_core_base = interpreter;
+ }
break;
}
@@ -213,6 +218,8 @@ void SetMode(CoreMode new_mode)
case MODE_JIT: // Switching from interpreter to JIT.
// Don't really need to do much. It'll work, the cache will refill itself.
cpu_core_base = JitInterface::GetCore();
+ if (!cpu_core_base) // Has a chance to not get a working JIT core if one isn't active on host
+ cpu_core_base = interpreter;
break;
}
}