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authorTilka <tilkax@gmail.com>2018-10-10 00:07:28 +0100
committerGitHub <noreply@github.com>2018-10-10 00:07:28 +0100
commitf8c679bab962e79a3aa2cf5990f542dbcf4caf74 (patch)
treedebdae731bcbef0b5d0c0104865652a2ab9ef9b2 /Source/Core
parent7cfba7397ccc205d72cb6bd4891d1735a812702c (diff)
parentdb54b903ef8e2f9407be063c967d47f7c806db1f (diff)
Merge pull request #7482 from Tilka/sanity
Fix warning and zero-initialize variables
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/PowerPC.cpp5
-rw-r--r--Source/Core/DolphinQt/Debugger/RegisterColumn.h2
2 files changed, 4 insertions, 3 deletions
diff --git a/Source/Core/Core/PowerPC/PowerPC.cpp b/Source/Core/Core/PowerPC/PowerPC.cpp
index 8abac6ae87..174406d1ce 100644
--- a/Source/Core/Core/PowerPC/PowerPC.cpp
+++ b/Source/Core/Core/PowerPC/PowerPC.cpp
@@ -30,7 +30,7 @@
namespace PowerPC
{
// STATE_TO_SAVE
-PowerPCState ppcState;
+PowerPCState ppcState{};
static CPUCoreBase* s_cpu_core_base = nullptr;
static bool s_cpu_core_base_is_injected = false;
@@ -191,7 +191,8 @@ static void InitializeCPUCore(CPUCore cpu_core)
s_cpu_core_base = JitInterface::InitJitCore(cpu_core);
if (!s_cpu_core_base) // Handle Situations where JIT core isn't available
{
- WARN_LOG(POWERPC, "CPU core %d not available. Falling back to default.", cpu_core);
+ WARN_LOG(POWERPC, "CPU core %d not available. Falling back to default.",
+ static_cast<int>(cpu_core));
s_cpu_core_base = JitInterface::InitJitCore(DefaultCPUCore());
}
break;
diff --git a/Source/Core/DolphinQt/Debugger/RegisterColumn.h b/Source/Core/DolphinQt/Debugger/RegisterColumn.h
index dfc58a41f5..1604aea401 100644
--- a/Source/Core/DolphinQt/Debugger/RegisterColumn.h
+++ b/Source/Core/DolphinQt/Debugger/RegisterColumn.h
@@ -67,6 +67,6 @@ private:
std::function<u64()> m_get_register;
std::function<void(u64)> m_set_register;
- u64 m_value;
+ u64 m_value = 0;
RegisterDisplay m_display = RegisterDisplay::Hex;
};