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authorJosJuice <josjuice@gmail.com>2021-08-21 20:28:18 +0200
committerJosJuice <josjuice@gmail.com>2021-08-26 15:04:56 +0200
commitfeefc17b023cda2d5c012d8b5b1a5ca019a3d717 (patch)
treef4cd1d9d787c9fc1f508f2026dc142d96120e83e /Source/Core
parent91b112b984ec8d460bd15fc64129411ee633d5a5 (diff)
JitArm64: divwx - Optimize comparisons to 0x80000000
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp18
1 files changed, 4 insertions, 14 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
index f61fbe49a5..989a732cee 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
@@ -1384,15 +1384,9 @@ void JitArm64::divwx(UGeckoInstruction inst)
}
else if (divisor == -1)
{
- ARM64Reg WA = gpr.GetReg();
-
// Rd = (Ra == 0x80000000) ? 0xFFFFFFFF : -Ra
- MOVI2R(WA, 0x80000000);
- CMP(gpr.R(a), WA);
- NEG(gpr.R(d), gpr.R(a));
- CSINV(gpr.R(d), gpr.R(d), ARM64Reg::WZR, CCFlags::CC_NEQ);
-
- gpr.Unlock(WA);
+ NEGS(gpr.R(d), gpr.R(a));
+ CSINV(gpr.R(d), gpr.R(d), ARM64Reg::WZR, CCFlags::CC_VC);
}
else if (divisor == 2 || divisor == -2)
{
@@ -1484,15 +1478,13 @@ void JitArm64::divwx(UGeckoInstruction inst)
gpr.BindToRegister(d, d == a || d == b);
- ARM64Reg WA = gpr.GetReg();
ARM64Reg RA = gpr.R(a);
ARM64Reg RB = gpr.R(b);
ARM64Reg RD = gpr.R(d);
FixupBranch overflow1 = CBZ(RB);
- MOVI2R(WA, -0x80000000LL);
- CMP(RA, WA);
- CCMN(RB, 1, 0, CC_EQ);
+ NEGS(ARM64Reg::WZR, RA); // Is RA 0x80000000?
+ CCMN(RB, 1, 0, CC_VS); // Is RB -1?
FixupBranch overflow2 = B(CC_EQ);
SDIV(RD, RA, RB);
FixupBranch done = B();
@@ -1504,8 +1496,6 @@ void JitArm64::divwx(UGeckoInstruction inst)
SetJumpTarget(done);
- gpr.Unlock(WA);
-
if (inst.Rc)
ComputeRC0(RD);
}