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authorTillmann Karras <tilkax@gmail.com>2013-11-21 05:31:55 +0100
committerTillmann Karras <tilkax@gmail.com>2013-11-21 05:31:55 +0100
commitff917897731d400a8e71c1480425733e651126ee (patch)
treeaba7bef170df518ea9fb079d0eb48dd1ef0acde2 /Source/Core
parent011fe86d01ebec800ed1018e99a364a620d051bd (diff)
Jit64: really fix fmrx regression
This is more tricky than I thought!
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp19
1 files changed, 15 insertions, 4 deletions
diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp
index 65f186e802..7f77112ae9 100644
--- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp
+++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_FloatingPoint.cpp
@@ -224,15 +224,26 @@ void Jit64::fmrx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff)
- if (inst.Rc) {
+ if (inst.Rc)
+ {
Default(inst); return;
}
int d = inst.FD;
int b = inst.FB;
- if (d != b) {
+ if (d != b)
+ {
fpr.Lock(b, d);
- fpr.BindToRegister(d);
- MOVSD(fpr.RX(d), fpr.R(b));
+
+ // we don't need to load d, but if it already is, it must be marked as dirty
+ if (fpr.IsBound(d))
+ {
+ fpr.BindToRegister(d);
+ }
+ fpr.BindToRegister(b, true, false);
+
+ // caveat: the order of ModRM:r/m, ModRM:reg is deliberate!
+ // "MOVSD reg, mem" zeros out the upper half of the destination register
+ MOVSD(fpr.R(d), fpr.RX(b));
fpr.UnlockAll();
}
}