diff options
| author | Sintendo <bram.speeckaert@gmail.com> | 2018-09-14 23:21:59 +0200 |
|---|---|---|
| committer | Sintendo <bram.speeckaert@gmail.com> | 2018-09-16 19:52:12 +0200 |
| commit | 8a93dd01054f78be15d177e3578f7db0203a3241 (patch) | |
| tree | a66fc13e51e2255c6a5619e31d2ecfdcd89ccb3e /Source/UnitTests/Common/x64EmitterTest.cpp | |
| parent | 58a0d0f117caff819177053b5b9bdf1774a91929 (diff) | |
x64EmitterTest: Fix linting issues
Diffstat (limited to 'Source/UnitTests/Common/x64EmitterTest.cpp')
| -rw-r--r-- | Source/UnitTests/Common/x64EmitterTest.cpp | 40 |
1 files changed, 26 insertions, 14 deletions
diff --git a/Source/UnitTests/Common/x64EmitterTest.cpp b/Source/UnitTests/Common/x64EmitterTest.cpp index 77f8db9aea..ff0c64b876 100644 --- a/Source/UnitTests/Common/x64EmitterTest.cpp +++ b/Source/UnitTests/Common/x64EmitterTest.cpp @@ -35,7 +35,10 @@ const std::vector<NamedReg> reg8names{ }; const std::vector<NamedReg> reg8hnames{ - {AH, "ah"}, {BH, "bh"}, {CH, "ch"}, {DH, "dh"}, + {AH, "ah"}, + {BH, "bh"}, + {CH, "ch"}, + {DH, "dh"}, }; const std::vector<NamedReg> reg16names{ @@ -306,10 +309,12 @@ TEST_F(x64EmitterTest, CMOVcc_Register) emitter->CMOVcc(32, RAX, R(R12), cc.cc); emitter->CMOVcc(16, RAX, R(R12), cc.cc); - ExpectDisassembly("cmov" + cc.name + " rax, r12 " - "cmov" + - cc.name + " eax, r12d " - "cmov" + + ExpectDisassembly("cmov" + cc.name + + " rax, r12 " + "cmov" + + cc.name + + " eax, r12d " + "cmov" + cc.name + " ax, r12w"); } } @@ -379,10 +384,12 @@ TEST_F(x64EmitterTest, MOVNT_DQ_PS_PD) emitter->MOVNTDQ(MatR(RAX), r.reg); emitter->MOVNTPS(MatR(RAX), r.reg); emitter->MOVNTPD(MatR(RAX), r.reg); - ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name + " " - "movntps dqword ptr ds:[rax], " + - r.name + " " - "movntpd dqword ptr ds:[rax], " + + ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name + + " " + "movntps dqword ptr ds:[rax], " + + r.name + + " " + "movntpd dqword ptr ds:[rax], " + r.name); } } @@ -576,7 +583,8 @@ TEST_F(x64EmitterTest, BSWAP) int bits; std::vector<NamedReg> regs; } regsets[] = { - {32, reg32names}, {64, reg64names}, + {32, reg32names}, + {64, reg64names}, }; for (const auto& regset : regsets) for (const auto& r : regset.regs) @@ -889,7 +897,8 @@ TWO_OP_SSE_TEST(PMOVZXDQ, "qword") std::string out_name; \ std::string size; \ } regsets[] = { \ - {32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ + {32, reg32names, "eax", "dword"}, \ + {64, reg64names, "rax", "qword"}, \ }; \ for (const auto& regset : regsets) \ for (const auto& r : regset.regs) \ @@ -921,7 +930,8 @@ VEX_RMR_TEST(BZHI) std::string out_name; \ std::string size; \ } regsets[] = { \ - {32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ + {32, reg32names, "eax", "dword"}, \ + {64, reg64names, "rax", "qword"}, \ }; \ for (const auto& regset : regsets) \ for (const auto& r : regset.regs) \ @@ -952,7 +962,8 @@ VEX_RRM_TEST(ANDN) std::string out_name; \ std::string size; \ } regsets[] = { \ - {32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ + {32, reg32names, "eax", "dword"}, \ + {64, reg64names, "rax", "qword"}, \ }; \ for (const auto& regset : regsets) \ for (const auto& r : regset.regs) \ @@ -981,7 +992,8 @@ VEX_RM_TEST(BLSI) std::string out_name; \ std::string size; \ } regsets[] = { \ - {32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \ + {32, reg32names, "eax", "dword"}, \ + {64, reg64names, "rax", "qword"}, \ }; \ for (const auto& regset : regsets) \ for (const auto& r : regset.regs) \ |