diff options
| author | Bram Speeckaert <bram.speeckaert@guardsquare.com> | 2024-05-04 17:26:23 +0200 |
|---|---|---|
| committer | Bram Speeckaert <bram.speeckaert@guardsquare.com> | 2024-05-07 21:11:49 +0200 |
| commit | 0189692ea37f2fa3d590c72fdb1937ed56d98b83 (patch) | |
| tree | 17ccd53074c22f8c5fb52a060922defc72eb9b11 /Source | |
| parent | defe97d9f15d8fbe5a1968064fc2665f14178b62 (diff) | |
JitArm64: divwx - Conditionally skip temp reg allocation
Diffstat (limited to 'Source')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp index fb6a4e1ac2..311bd31d91 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp @@ -1675,7 +1675,8 @@ void JitArm64::divwx(UGeckoInstruction inst) { const s32 divisor = s32(gpr.GetImm(b)); - gpr.BindToRegister(d, d == a); + const bool allocate_reg = a == d; + gpr.BindToRegister(d, allocate_reg); // Handle 0, 1, and -1 explicitly if (divisor == 0) @@ -1712,7 +1713,6 @@ void JitArm64::divwx(UGeckoInstruction inst) ARM64Reg RA = gpr.R(a); ARM64Reg RD = gpr.R(d); - const bool allocate_reg = a == d; ARM64Reg WA = allocate_reg ? gpr.GetReg() : RD; TST(RA, RA); @@ -1732,13 +1732,13 @@ void JitArm64::divwx(UGeckoInstruction inst) // Optimize signed 32-bit integer division by a constant SignedMagic m = SignedDivisionConstants(divisor); - ARM64Reg WA = gpr.GetReg(); - ARM64Reg WB = gpr.GetReg(); ARM64Reg RD = gpr.R(d); + ARM64Reg WA = gpr.GetReg(); + ARM64Reg WB = allocate_reg ? gpr.GetReg() : RD; + ARM64Reg XD = EncodeRegTo64(RD); ARM64Reg XA = EncodeRegTo64(WA); ARM64Reg XB = EncodeRegTo64(WB); - ARM64Reg XD = EncodeRegTo64(RD); SXTW(XA, gpr.R(a)); MOVI2R(XB, s64(m.multiplier)); @@ -1771,7 +1771,9 @@ void JitArm64::divwx(UGeckoInstruction inst) ADD(RD, WA, RD); } - gpr.Unlock(WA, WB); + gpr.Unlock(WA); + if (allocate_reg) + gpr.Unlock(WB); } if (inst.Rc) |