diff options
| author | Sintendo <3380580+Sintendo@users.noreply.github.com> | 2024-10-10 22:16:25 +0200 |
|---|---|---|
| committer | Sintendo <3380580+Sintendo@users.noreply.github.com> | 2024-10-10 22:16:28 +0200 |
| commit | 0d9984b299ece57b5fec22d5d45d55d8f3f6554e (patch) | |
| tree | 2e666366d96b9004291703c30f8c8c09b43b006c /Source | |
| parent | 8304ae33613c197ae377ed246d705f0b2a398e38 (diff) | |
JitArm64_SystemRegisters: Optimize mtspr
No need to materialize the immediate if it is zero, we can just use WZR.
Before:
mov w27, #0x0 ; =0
str w27, [x29, #0x1178]
After:
str wzr, [x29, #0x1178]
Diffstat (limited to 'Source')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp index 87f652d6d4..8ffa1b84aa 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp @@ -477,7 +477,7 @@ void JitArm64::mtspr(UGeckoInstruction inst) } // OK, this is easy. - ARM64Reg RD = gpr.R(inst.RD); + ARM64Reg RD = gpr.IsImm(inst.RD, 0) ? ARM64Reg::WZR : gpr.R(inst.RD); STR(IndexType::Unsigned, RD, PPC_REG, PPCSTATE_OFF_SPR(iIndex)); } |