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authorSintendo <bram.speeckaert@gmail.com>2021-06-15 18:25:55 +0200
committerSintendo <bram.speeckaert@gmail.com>2021-06-16 20:33:02 +0200
commit18aaf488b0cb3509727ee8d252c0f08a5951fffa (patch)
treef0fef8dc819840fab067013a09d36a2ca0ea8c51 /Source
parent4c37cc7e5e8d613166cc5d39f51678c5448a46fc (diff)
Jit64: subfic - Optimize constants for d != a
These optimizations were already present, but only when d == a. They also make sense when this condition does not hold. - imm == 0 Before: 41 BB 00 00 00 00 mov r11d,0 45 2B DF sub r11d,r15d After: 45 8B DF mov r11d,r15d 41 F7 DB neg r11d - imm == -1 Before: 41 BD FF FF FF FF mov r13d,0FFFFFFFFh 44 2B EE sub r13d,esi 0F 93 45 68 setae byte ptr [rbp+68h] After: 44 8B EE mov r13d,esi 41 F7 D5 not r13d C6 45 68 01 mov byte ptr [rbp+68h],1
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp45
1 files changed, 24 insertions, 21 deletions
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
index 30cc919d60..1f6371e2c2 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
@@ -898,28 +898,31 @@ void Jit64::subfic(UGeckoInstruction inst)
RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
RegCache::Realize(Ra, Rd);
- if (d == a)
+ if (imm == 0)
{
- if (imm == 0)
- {
- // Flags act exactly like subtracting from 0
- NEG(32, Rd);
- // Output carry is inverted
- FinalizeCarry(CC_NC);
- }
- else if (imm == -1)
- {
- NOT(32, Rd);
- // CA is always set in this case
- FinalizeCarry(true);
- }
- else
- {
- NOT(32, Rd);
- ADD(32, Rd, Imm32(imm + 1));
- // Output carry is normal
- FinalizeCarry(CC_C);
- }
+ if (d != a)
+ MOV(32, Rd, Ra);
+
+ // Flags act exactly like subtracting from 0
+ NEG(32, Rd);
+ // Output carry is inverted
+ FinalizeCarry(CC_NC);
+ }
+ else if (imm == -1)
+ {
+ if (d != a)
+ MOV(32, Rd, Ra);
+
+ NOT(32, Rd);
+ // CA is always set in this case
+ FinalizeCarry(true);
+ }
+ else if (d == a)
+ {
+ NOT(32, Rd);
+ ADD(32, Rd, Imm32(imm + 1));
+ // Output carry is normal
+ FinalizeCarry(CC_C);
}
else
{