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authorPokechu22 <Pokechu022@gmail.com>2021-09-04 10:49:13 -0700
committerPokechu22 <Pokechu022@gmail.com>2021-10-13 11:44:28 -0700
commit673f886a7ef101eb2a619df8a6ffeb82f5e4aa6e (patch)
tree85bc24e3ca3116d0faafcb245dbd4ebead22e3aa /Source
parentaacc1a5e49d2fe6e9ed28f68381eaa84c6d79468 (diff)
MMU: Replace uses of cassert with Common/Assert.h
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Core/PowerPC/MMU.cpp11
1 files changed, 5 insertions, 6 deletions
diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp
index a567c60047..f97f916f2f 100644
--- a/Source/Core/Core/PowerPC/MMU.cpp
+++ b/Source/Core/Core/PowerPC/MMU.cpp
@@ -3,7 +3,6 @@
#include "Core/PowerPC/MMU.h"
-#include <cassert>
#include <cstddef>
#include <cstring>
#include <string>
@@ -495,7 +494,7 @@ TryReadResult<u32> HostTryReadInstruction(const u32 address, RequestedAddressSpa
}
}
- assert(0);
+ ASSERT(0);
return TryReadResult<u32>();
}
@@ -601,7 +600,7 @@ static TryReadResult<T> HostTryReadUX(const u32 address, RequestedAddressSpace s
}
}
- assert(0);
+ ASSERT(0);
return TryReadResult<T>();
}
@@ -785,7 +784,7 @@ static TryWriteResult HostTryWriteUX(const u32 var, const u32 address, const u32
return TryWriteResult(true);
}
- assert(0);
+ ASSERT(0);
return TryWriteResult();
}
@@ -925,7 +924,7 @@ bool HostIsRAMAddress(u32 address, RequestedAddressSpace space)
return IsRAMAddress<XCheckTLBFlag::NoException>(address, true);
}
- assert(0);
+ ASSERT(0);
return false;
}
@@ -947,7 +946,7 @@ bool HostIsInstructionRAMAddress(u32 address, RequestedAddressSpace space)
return IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, true);
}
- assert(0);
+ ASSERT(0);
return false;
}