diff options
| author | nakeee <nakeee@gmail.com> | 2009-04-05 08:59:18 +0000 |
|---|---|---|
| committer | nakeee <nakeee@gmail.com> | 2009-04-05 08:59:18 +0000 |
| commit | 82880f96daf438eb3806fbaec1908fb89a979275 (patch) | |
| tree | 90cba06b0a9b24d1aa5084acda37537db1cadd93 /Source | |
| parent | b19309fdb3c1f692261f3f24adb2fc88265989e3 (diff) | |
Condition guessing please review..
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2868 8ced0084-cf51-0410-be5f-012b33b47a6e
Diffstat (limited to 'Source')
| -rw-r--r-- | Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp b/Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp index 55132dcaff..aaeb33acea 100644 --- a/Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp +++ b/Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp @@ -78,10 +78,14 @@ s8 GetMultiplyModifier() {
return(1);
}
-
return(2);
}
+
+// 0x02 - overflow????
+// 0x04 - Zero bit
+// 0x08 - Sign bit
+// 0x40 - Logical Zero bit
bool CheckCondition(u8 _Condition)
{
bool taken = false;
@@ -90,49 +94,46 @@ bool CheckCondition(u8 _Condition) {
case 0x0: //NS - NOT SIGN
- if ((!(g_dsp.r[R_SR] & 0x02)) && (!(g_dsp.r[R_SR] & 0x08)))
+ if (!(g_dsp.r[R_SR] & 0x08))
taken = true;
-
break;
case 0x1: // S - SIGN
- if ((!(g_dsp.r[R_SR] & 0x02)) && (g_dsp.r[R_SR] & 0x08))
+ if (g_dsp.r[R_SR] & 0x08)
taken = true;
-
break;
case 0x2: // G - GREATER
- if (!(g_dsp.r[R_SR] & 0x08))
+ if ( (!(g_dsp.r[R_SR] & 0x02) || !(g_dsp.r[R_SR] & 0x04)) && !(g_dsp.r[R_SR] & 0x08))
taken = true;
-
break;
case 0x3: // LE - LESS EQUAL
if ((g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x04) || (g_dsp.r[R_SR] & 0x08))
taken = true;
-
break;
case 0x4: // NZ - NOT ZERO
if (!(g_dsp.r[R_SR] & 0x04))
taken = true;
-
break;
case 0x5: // Z - ZERO
if (g_dsp.r[R_SR] & 0x04)
taken = true;
-
break;
case 0x6: // L - LESS
+ if ((g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x08))
+ taken = true;
break;
case 0x7: // GE - GREATER EQUAL
+ if ( (!(g_dsp.r[R_SR] & 0x02) || (g_dsp.r[R_SR] & 0x04)) && !(g_dsp.r[R_SR] & 0x08))
break;
case 0xc: // LNZ - LOGIC NOT ZERO
|