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authorTilka <tilkax@gmail.com>2024-10-11 21:42:12 +0100
committerGitHub <noreply@github.com>2024-10-11 21:42:12 +0100
commit8679d6c334fde42d377d69c78b8dcd427d8d47fc (patch)
treea18acd037dfa900af4c7a1c08f5768bba36607b6 /Source
parentd2a56b321fb8957c8bb13911ef2b60a89c244de4 (diff)
parenta9a779a6b9a9843c456d208575c7749e89a33429 (diff)
Merge pull request #13120 from Sintendo/mtspr
JitArm64: Optimize mtspr
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp8
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h2
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp2
3 files changed, 7 insertions, 5 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
index f3d263379c..63ccff4c47 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
@@ -649,7 +649,7 @@ void JitArm64::cmp(UGeckoInstruction inst)
SXTW(CR, gpr.R(b));
NEG(CR, CR);
}
- else if (gpr.IsImm(a) && gpr.GetImm(a) == 0xFFFFFFFF)
+ else if (gpr.IsImm(a, 0xFFFFFFFF))
{
SXTW(CR, gpr.R(b));
MVN(CR, CR);
@@ -1640,7 +1640,7 @@ void JitArm64::divwx(UGeckoInstruction inst)
if (inst.Rc)
ComputeRC0(imm_d);
}
- else if (gpr.IsImm(a) && gpr.GetImm(a) == 0)
+ else if (gpr.IsImm(a, 0))
{
// Zero divided by anything is always zero
gpr.SetImmediate(d, 0);
@@ -1829,7 +1829,7 @@ void JitArm64::slwx(UGeckoInstruction inst)
if (inst.Rc)
ComputeRC0(gpr.GetImm(a));
}
- else if (gpr.IsImm(s) && gpr.GetImm(s) == 0)
+ else if (gpr.IsImm(s, 0))
{
gpr.SetImmediate(a, 0);
if (inst.Rc)
@@ -1934,7 +1934,7 @@ void JitArm64::srawx(UGeckoInstruction inst)
ComputeRC0(gpr.GetImm(a));
return;
}
- else if (gpr.IsImm(s) && gpr.GetImm(s) == 0)
+ else if (gpr.IsImm(s, 0))
{
gpr.SetImmediate(a, 0);
ComputeCarry(false);
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
index 5e2b4c1f36..5182a8456d 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
@@ -285,6 +285,8 @@ public:
// Gets the immediate that a register is set to. Only valid for guest GPRs.
u32 GetImm(size_t preg) const { return GetGuestGPROpArg(preg).GetImm(); }
+ bool IsImm(size_t preg, u32 imm) { return IsImm(preg) && GetImm(preg) == imm; }
+
// Binds a guest GPR to a host register, optionally loading its value.
//
// preg: The guest register index.
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
index 87f652d6d4..8ffa1b84aa 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
@@ -477,7 +477,7 @@ void JitArm64::mtspr(UGeckoInstruction inst)
}
// OK, this is easy.
- ARM64Reg RD = gpr.R(inst.RD);
+ ARM64Reg RD = gpr.IsImm(inst.RD, 0) ? ARM64Reg::WZR : gpr.R(inst.RD);
STR(IndexType::Unsigned, RD, PPC_REG, PPCSTATE_OFF_SPR(iIndex));
}