diff options
| author | skidau <skidau@gmail.com> | 2014-01-13 22:18:19 +1100 |
|---|---|---|
| committer | skidau <skidau@gmail.com> | 2014-01-13 22:18:19 +1100 |
| commit | 8b53385c5433fb0c3d78d01abc38f10cfddfa294 (patch) | |
| tree | a7147c6d1795dc298059906b0c52eed9ef8bcaf3 /Source | |
| parent | e00c3ce363b200b31a38a7d2596204539d155139 (diff) | |
Added a check for a redundant mov in the fastmem writes code.
Fixes issue 6905.
Diffstat (limited to 'Source')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp b/Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp index b7cc031c99..828d8a6a31 100644 --- a/Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp +++ b/Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp @@ -117,13 +117,17 @@ const u8 *TrampolineCache::GetWriteTrampoline(const InstructionInfo &info, u32 r PanicAlert("Incorrect use of SafeWriteRegToReg"); if (addrReg != ABI_PARAM1) { - MOV(64, R(ABI_PARAM1), R((X64Reg)dataReg)); - MOV(64, R(ABI_PARAM2), R((X64Reg)addrReg)); + if (ABI_PARAM1 != dataReg) + MOV(64, R(ABI_PARAM1), R((X64Reg)dataReg)); + if (ABI_PARAM2 != addrReg) + MOV(64, R(ABI_PARAM2), R((X64Reg)addrReg)); } else { - MOV(64, R(ABI_PARAM2), R((X64Reg)addrReg)); - MOV(64, R(ABI_PARAM1), R((X64Reg)dataReg)); + if (ABI_PARAM2 != addrReg) + MOV(64, R(ABI_PARAM2), R((X64Reg)addrReg)); + if (ABI_PARAM1 != dataReg) + MOV(64, R(ABI_PARAM1), R((X64Reg)dataReg)); } if (info.displacement) |