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authordegasus <wickmarkus@web.de>2019-11-27 11:01:04 +0100
committerdegasus <wickmarkus@web.de>2019-12-28 12:57:51 +0100
commit9d88180df7d07b830e8880690922f8db0076ffdd (patch)
tree45b9aba5f0644d275983a16d8bb38da3bc8c3fb1 /Source
parent084344aa5d9a39fc05cfe952005e530766c3c29c (diff)
MMU: Use the Memory helpers for physical memory.
physical_base is a fastmem helper. Its access is unsafe and might not be available without a Jit.
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Core/PowerPC/MMU.cpp8
1 files changed, 3 insertions, 5 deletions
diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp
index 3d99386533..952556ddea 100644
--- a/Source/Core/Core/PowerPC/MMU.cpp
+++ b/Source/Core/Core/PowerPC/MMU.cpp
@@ -1117,13 +1117,12 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
for (int i = 0; i < 8; i++, pteg_addr += 8)
{
- u32 pteg;
- std::memcpy(&pteg, &Memory::physical_base[pteg_addr], sizeof(u32));
+ u32 pteg = Common::swap32(Memory::Read_U32(pteg_addr));
if (pte1 == pteg)
{
UPTE2 PTE2;
- PTE2.Hex = Common::swap32(&Memory::physical_base[pteg_addr + 4]);
+ PTE2.Hex = Memory::Read_U32(pteg_addr + 4);
// set the access bits
switch (flag)
@@ -1145,8 +1144,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
if (!IsNoExceptionFlag(flag))
{
- const u32 swapped_pte2 = Common::swap32(PTE2.Hex);
- std::memcpy(&Memory::physical_base[pteg_addr + 4], &swapped_pte2, sizeof(u32));
+ Memory::Write_U32(PTE2.Hex, pteg_addr + 4);
}
// We already updated the TLB entry if this was caused by a C bit.