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authorRyan Houdek <Sonicadvance1@gmail.com>2014-09-02 18:37:01 -0500
committerRyan Houdek <Sonicadvance1@gmail.com>2014-09-06 20:14:53 -0500
commitcdd2bd6cdc7802c907dda620ff265dd8dde69cdc (patch)
tree7eae3a6769e2e17d26f861427a0e5513bd628468 /Source
parent82dae72b63a388cff83ddb443002d65cab57f514 (diff)
Add a couple of asserts to the Arm64 JIT to make sure we can load everything.
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/Jit.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h
index a1ff3e525d..ffa7a060f6 100644
--- a/Source/Core/Core/PowerPC/JitArm64/Jit.h
+++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h
@@ -14,6 +14,11 @@
#include "Core/PowerPC/JitCommon/JitBase.h"
#define PPCSTATE_OFF(elem) ((s64)&PowerPC::ppcState.elem - (s64)&PowerPC::ppcState)
+
+// Some asserts to make sure we will be able to load everything
+static_assert(PPCSTATE_OFF(spr[1023]) <= 16380, "LDR(32bit) can't reach the last SPR");
+static_assert((PPCSTATE_OFF(ps[0][0]) % 8) == 0, "LDR(64bit VFP) requires FPRs to be 8 byte aligned");
+
using namespace Arm64Gen;
class JitArm64 : public JitBase, public Arm64Gen::ARM64CodeBlock
{