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authorAdmiral H. Curtiss <pikachu025@gmail.com>2023-01-06 04:28:58 +0100
committerAdmiral H. Curtiss <pikachu025@gmail.com>2023-01-06 05:33:21 +0100
commitd33416fc35d53b9b4dd5b03e36f3e6098cb392fd (patch)
tree3eba65c167e8c6180b0418cb22a5d86cb60b46dd /Source
parentfbcaf83d30f4a467517058b3ec395961c23b69ec (diff)
HW/Memmap: Zero-initialize members by default.
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Core/HW/Memmap.h34
1 files changed, 17 insertions, 17 deletions
diff --git a/Source/Core/Core/HW/Memmap.h b/Source/Core/Core/HW/Memmap.h
index e79252ba7d..41147b2049 100644
--- a/Source/Core/Core/HW/Memmap.h
+++ b/Source/Core/Core/HW/Memmap.h
@@ -155,28 +155,28 @@ private:
u8* m_logical_page_mappings_base = nullptr;
// The actual memory used for backing the memory map.
- u8* m_ram;
- u8* m_exram;
- u8* m_l1_cache;
- u8* m_fake_vmem;
+ u8* m_ram = nullptr;
+ u8* m_exram = nullptr;
+ u8* m_l1_cache = nullptr;
+ u8* m_fake_vmem = nullptr;
// m_ram_size is the amount allocated by the emulator, whereas m_ram_size_real
// is what will be reported in lowmem, and thus used by emulated software.
// Note: Writing to lowmem is done by IPL. If using retail IPL, it will
// always be set to 24MB.
- u32 m_ram_size_real;
- u32 m_ram_size;
- u32 m_ram_mask;
- u32 m_fakevmem_size;
- u32 m_fakevmem_mask;
- u32 m_l1_cache_size;
- u32 m_l1_cache_mask;
+ u32 m_ram_size_real = 0;
+ u32 m_ram_size = 0;
+ u32 m_ram_mask = 0;
+ u32 m_fakevmem_size = 0;
+ u32 m_fakevmem_mask = 0;
+ u32 m_l1_cache_size = 0;
+ u32 m_l1_cache_mask = 0;
// m_exram_size is the amount allocated by the emulator, whereas m_exram_size_real
// is what gets used by emulated software. If using retail IOS, it will
// always be set to 64MB.
- u32 m_exram_size_real;
- u32 m_exram_size;
- u32 m_exram_mask;
+ u32 m_exram_size_real = 0;
+ u32 m_exram_size = 0;
+ u32 m_exram_mask = 0;
bool m_is_fastmem_arena_initialized = false;
@@ -231,12 +231,12 @@ private:
//
// TODO: The actual size of RAM is 24MB; the other 8MB shouldn't be backed by actual memory.
// TODO: Do we want to handle the mirrors of the GC RAM?
- std::array<PhysicalMemoryRegion, 4> m_physical_regions;
+ std::array<PhysicalMemoryRegion, 4> m_physical_regions{};
std::vector<LogicalMemoryView> m_logical_mapped_entries;
- std::array<void*, PowerPC::BAT_PAGE_COUNT> m_physical_page_mappings;
- std::array<void*, PowerPC::BAT_PAGE_COUNT> m_logical_page_mappings;
+ std::array<void*, PowerPC::BAT_PAGE_COUNT> m_physical_page_mappings{};
+ std::array<void*, PowerPC::BAT_PAGE_COUNT> m_logical_page_mappings{};
void InitMMIO(bool is_wii);
};