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| author | JMC47 <JMC4789@gmail.com> | 2023-06-15 11:32:30 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-06-15 11:32:30 -0400 |
| commit | f0f8225ff8bcbee618e68e717f51678ea076fd72 (patch) | |
| tree | 80a88f8bcdce3b65fef2421fe879419b4d35cfb1 /Source | |
| parent | bd125733f0248017f6d3361f7a80381650c93aac (diff) | |
| parent | c55e08ff738d58ce4b49988c6d9a6cf06e45c069 (diff) | |
Merge pull request #11424 from Pokechu22/jit-imm-loadstore-update
Jit64: Attempt to fix updating stores with an immediate value
Diffstat (limited to 'Source')
| -rw-r--r-- | Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp | 2 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp index 6b7df45908..88424d2136 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp @@ -507,7 +507,7 @@ void Jit64::stX(UGeckoInstruction inst) } else { - RCOpArg Ra = gpr.UseNoImm(a, RCMode::Write); + RCOpArg Ra = gpr.RevertableBind(a, RCMode::Write); RegCache::Realize(Ra); MemoryExceptionCheck(); MOV(32, Ra, Imm32(addr)); diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp index 0af85a9f26..7ac34f5d6e 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp @@ -22,7 +22,7 @@ void Jit64::lfXXX(UGeckoInstruction inst) bool indexed = inst.OPCD == 31; bool update = indexed ? !!(inst.SUBOP10 & 0x20) : !!(inst.OPCD & 1); bool single = indexed ? !(inst.SUBOP10 & 0x40) : !(inst.OPCD & 2); - update &= indexed || inst.SIMM_16; + update &= indexed || (inst.SIMM_16 != 0); int d = inst.RD; int a = inst.RA; @@ -93,7 +93,7 @@ void Jit64::stfXXX(UGeckoInstruction inst) bool indexed = inst.OPCD == 31; bool update = indexed ? !!(inst.SUBOP10 & 0x20) : !!(inst.OPCD & 1); bool single = indexed ? !(inst.SUBOP10 & 0x40) : !(inst.OPCD & 2); - update &= indexed || inst.SIMM_16; + update &= indexed || (inst.SIMM_16 != 0); int s = inst.RS; int a = inst.RA; @@ -101,7 +101,7 @@ void Jit64::stfXXX(UGeckoInstruction inst) s32 imm = (s16)inst.SIMM_16; int accessSize = single ? 32 : 64; - FALLBACK_IF(update && jo.memcheck && a == b); + FALLBACK_IF(update && jo.memcheck && indexed && a == b); if (single) { @@ -144,7 +144,7 @@ void Jit64::stfXXX(UGeckoInstruction inst) } else { - RCOpArg Ra = gpr.UseNoImm(a, RCMode::Write); + RCOpArg Ra = gpr.RevertableBind(a, RCMode::Write); RegCache::Realize(Ra); MemoryExceptionCheck(); MOV(32, Ra, Imm32(addr)); |