summaryrefslogtreecommitdiff
path: root/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'Source/Core/DSPCore/Src/DSPIntCCUtil.cpp')
-rw-r--r--Source/Core/DSPCore/Src/DSPIntCCUtil.cpp25
1 files changed, 22 insertions, 3 deletions
diff --git a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
index 147c239f71..42ec92e4a6 100644
--- a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
+++ b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp
@@ -26,7 +26,7 @@
namespace DSPInterpreter {
-void Update_SR_Register64(s64 _Value)
+void Update_SR_Register64(s64 _Value, bool carry, bool overflow)
{
// TODO: Should also set 0x10 and 0x01 (also 0x02?)
g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
@@ -41,6 +41,16 @@ void Update_SR_Register64(s64 _Value)
g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
}
+ if (carry)
+ {
+ g_dsp.r[DSP_REG_SR] |= SR_CARRY;
+ }
+
+ if (overflow)
+ {
+ g_dsp.r[DSP_REG_SR] |= SR_OVERFLOW;
+ }
+
// Checks if top bits are equal, what is it good for?
if (((_Value >> 62) == 0) || (_Value >> 62 == 3))
{
@@ -49,11 +59,10 @@ void Update_SR_Register64(s64 _Value)
}
-void Update_SR_Register16(s16 _Value)
+void Update_SR_Register16(s16 _Value, bool carry, bool overflow)
{
g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
- // Only sets those 3 bits
if (_Value < 0)
{
@@ -65,6 +74,16 @@ void Update_SR_Register16(s16 _Value)
g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
}
+ if (carry)
+ {
+ g_dsp.r[DSP_REG_SR] |= SR_CARRY;
+ }
+
+ if (overflow)
+ {
+ g_dsp.r[DSP_REG_SR] |= SR_OVERFLOW;
+ }
+
// Checks if top bits are equal, what is it good for?
if (((_Value >> 14) == 0) || ((_Value >> 14) == 3))
{