diff options
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 45 |
1 files changed, 24 insertions, 21 deletions
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index 30cc919d60..1f6371e2c2 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -898,28 +898,31 @@ void Jit64::subfic(UGeckoInstruction inst) RCX64Reg Rd = gpr.Bind(d, RCMode::Write); RegCache::Realize(Ra, Rd); - if (d == a) + if (imm == 0) { - if (imm == 0) - { - // Flags act exactly like subtracting from 0 - NEG(32, Rd); - // Output carry is inverted - FinalizeCarry(CC_NC); - } - else if (imm == -1) - { - NOT(32, Rd); - // CA is always set in this case - FinalizeCarry(true); - } - else - { - NOT(32, Rd); - ADD(32, Rd, Imm32(imm + 1)); - // Output carry is normal - FinalizeCarry(CC_C); - } + if (d != a) + MOV(32, Rd, Ra); + + // Flags act exactly like subtracting from 0 + NEG(32, Rd); + // Output carry is inverted + FinalizeCarry(CC_NC); + } + else if (imm == -1) + { + if (d != a) + MOV(32, Rd, Ra); + + NOT(32, Rd); + // CA is always set in this case + FinalizeCarry(true); + } + else if (d == a) + { + NOT(32, Rd); + ADD(32, Rd, Imm32(imm + 1)); + // Output carry is normal + FinalizeCarry(CC_C); } else { |