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-rw-r--r--Source/Core/Core/PowerPC/PowerPC.cpp26
-rw-r--r--Source/Core/Core/PowerPC/PowerPC.h5
2 files changed, 0 insertions, 31 deletions
diff --git a/Source/Core/Core/PowerPC/PowerPC.cpp b/Source/Core/Core/PowerPC/PowerPC.cpp
index 127eff4ddf..9208f87b5f 100644
--- a/Source/Core/Core/PowerPC/PowerPC.cpp
+++ b/Source/Core/Core/PowerPC/PowerPC.cpp
@@ -5,8 +5,6 @@
#include <algorithm>
#include <cstring>
-#include <istream>
-#include <ostream>
#include <type_traits>
#include <vector>
@@ -61,30 +59,6 @@ static void InvalidateCacheThreadSafe(Core::System& system, u64 userdata, s64 cy
static_cast<u32>(userdata));
}
-std::istream& operator>>(std::istream& is, CPUCore& core)
-{
- std::underlying_type_t<CPUCore> val{};
-
- if (is >> val)
- {
- core = static_cast<CPUCore>(val);
- }
- else
- {
- // Upon failure, fall back to the cached interpreter
- // to ensure we always initialize our core reference.
- core = CPUCore::CachedInterpreter;
- }
-
- return is;
-}
-
-std::ostream& operator<<(std::ostream& os, CPUCore core)
-{
- os << static_cast<std::underlying_type_t<CPUCore>>(core);
- return os;
-}
-
PowerPCManager::PowerPCManager(Core::System& system)
: m_breakpoints(system), m_memchecks(system), m_debug_interface(system, m_symbol_db),
m_system(system)
diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h
index e4d00ec884..b38c4f5555 100644
--- a/Source/Core/Core/PowerPC/PowerPC.h
+++ b/Source/Core/Core/PowerPC/PowerPC.h
@@ -5,7 +5,6 @@
#include <array>
#include <cstddef>
-#include <iosfwd>
#include <span>
#include <tuple>
#include <type_traits>
@@ -41,10 +40,6 @@ enum class CPUCore
CachedInterpreter = 5,
};
-// For reading from and writing to our config.
-std::istream& operator>>(std::istream& is, CPUCore& core);
-std::ostream& operator<<(std::ostream& os, CPUCore core);
-
enum class CoreMode
{
Interpreter,