summaryrefslogtreecommitdiff
path: root/Source
diff options
context:
space:
mode:
Diffstat (limited to 'Source')
-rw-r--r--Source/Core/Common/Arm64Emitter.h2
-rw-r--r--Source/Core/Common/CodeBlock.h2
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/Jit.h2
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h18
4 files changed, 12 insertions, 12 deletions
diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h
index 98dad6c520..7281970889 100644
--- a/Source/Core/Common/Arm64Emitter.h
+++ b/Source/Core/Common/Arm64Emitter.h
@@ -276,7 +276,7 @@ public:
{
return m_type;
}
- ARM64Reg GetReg()
+ ARM64Reg GetReg() const
{
return m_destReg;
}
diff --git a/Source/Core/Common/CodeBlock.h b/Source/Core/Common/CodeBlock.h
index c982245912..ed1f464904 100644
--- a/Source/Core/Common/CodeBlock.h
+++ b/Source/Core/Common/CodeBlock.h
@@ -51,7 +51,7 @@ public:
region_size = 0;
}
- bool IsInSpace(u8 *ptr)
+ bool IsInSpace(u8 *ptr) const
{
return (ptr >= region) && (ptr < (region + region_size));
}
diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h
index e0ee7c5a83..18463b669e 100644
--- a/Source/Core/Core/PowerPC/JitArm64/Jit.h
+++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h
@@ -35,7 +35,7 @@ public:
JitBaseBlockCache *GetBlockCache() { return &blocks; }
- bool IsInCodeSpace(u8 *ptr) { return IsInSpace(ptr); }
+ bool IsInCodeSpace(u8 *ptr) const { return IsInSpace(ptr); }
bool HandleFault(uintptr_t access_address, SContext* ctx) override;
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
index 2e09cf8ee9..d4abffb523 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h
@@ -46,16 +46,16 @@ public:
{
}
- RegType GetType()
+ RegType GetType() const
{
return m_type;
}
- ARM64Reg GetReg()
+ ARM64Reg GetReg() const
{
return m_reg;
}
- u32 GetImm()
+ u32 GetImm() const
{
return m_value;
}
@@ -81,12 +81,12 @@ public:
m_last_used = 0xFFFF;
}
- u32 GetLastUsed() { return m_last_used; }
+ u32 GetLastUsed() const { return m_last_used; }
void ResetLastUsed() { m_last_used = 0; }
void IncrementLastUsed() { ++m_last_used; }
void SetDirty(bool dirty) { m_dirty = dirty; }
- bool IsDirty() { return m_dirty; }
+ bool IsDirty() const { return m_dirty; }
private:
// For REG_REG
@@ -106,10 +106,10 @@ class HostReg
public:
HostReg() : m_reg(INVALID_REG), m_locked(false) {}
HostReg(ARM64Reg reg) : m_reg(reg), m_locked(false) {}
- bool IsLocked() { return m_locked; }
+ bool IsLocked() const { return m_locked; }
void Lock() { m_locked = true; }
void Unlock() { m_locked = false; }
- ARM64Reg GetReg() { return m_reg; }
+ ARM64Reg GetReg() const { return m_reg; }
bool operator==(const ARM64Reg& reg)
{
@@ -233,10 +233,10 @@ public:
void SetImmediate(u32 preg, u32 imm);
// Returns if a register is set as an immediate
- bool IsImm(u32 reg) { return m_guest_registers[reg].GetType() == REG_IMM; }
+ bool IsImm(u32 reg) const { return m_guest_registers[reg].GetType() == REG_IMM; }
// Gets the immediate that a register is set to
- u32 GetImm(u32 reg) { return m_guest_registers[reg].GetImm(); }
+ u32 GetImm(u32 reg) const { return m_guest_registers[reg].GetImm(); }
void BindToRegister(u32 preg, bool do_load);