diff options
| author | Anghelo Carvajal <angheloalf95@gmail.com> | 2022-01-16 15:30:31 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-01-16 18:30:31 +0000 |
| commit | 194c99d80b07cdc4b4e2ae92fe0cee18a22615ec (patch) | |
| tree | c7fa58ad3f8c9295cc389ce961545ab6880b4a7b /tools/asm-differ | |
| parent | 9e6a6eee4cd53bd241ddcb349d94ad23b3e18c9f (diff) | |
Subrepos update (#613)
* a
* git subrepo pull tools/asm-differ --force
subrepo:
subdir: "tools/asm-differ"
merged: "6f8f80b71"
upstream:
origin: "https://github.com/simonlindholm/asm-differ"
branch: "main"
commit: "6f8f80b71"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* git subrepo pull tools/z64compress --force
subrepo:
subdir: "tools/z64compress"
merged: "9e7a6dbfa"
upstream:
origin: "https://github.com/z64me/z64compress.git"
branch: "main"
commit: "9e7a6dbfa"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* git subrepo pull tools/ZAPD --force
subrepo:
subdir: "tools/ZAPD"
merged: "bf16ff7c4"
upstream:
origin: "https://github.com/zeldaret/ZAPD.git"
branch: "master"
commit: "bf16ff7c4"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* Revert "git subrepo pull tools/z64compress --force"
This reverts commit a7cc87394ed4afb5ebe1f2318526545b6bbe205d.
Diffstat (limited to 'tools/asm-differ')
| -rw-r--r-- | tools/asm-differ/.gitrepo | 6 | ||||
| -rwxr-xr-x | tools/asm-differ/diff.py | 48 |
2 files changed, 23 insertions, 31 deletions
diff --git a/tools/asm-differ/.gitrepo b/tools/asm-differ/.gitrepo index 241c0ad6b..48e215c08 100644 --- a/tools/asm-differ/.gitrepo +++ b/tools/asm-differ/.gitrepo @@ -4,9 +4,9 @@ ; git-subrepo command. See https://github.com/git-commands/git-subrepo#readme ; [subrepo] - remote = https://github.com/simonlindholm/asm-differ.git + remote = https://github.com/simonlindholm/asm-differ branch = main - commit = 70c33cc125666495f84f8c7bee60d3158b4b1164 - parent = 62341d8db0c29d1d4f0c360196e428309ac373b6 + commit = 6f8f80b719359d018a2b734288c977aae6538870 + parent = 91a6e9f647d2035eba281d286c78f089f70f269f method = merge cmdver = 0.4.3 diff --git a/tools/asm-differ/diff.py b/tools/asm-differ/diff.py index 2ec117a12..9781420bb 100755 --- a/tools/asm-differ/diff.py +++ b/tools/asm-differ/diff.py @@ -1198,6 +1198,9 @@ def parse_elf_data_references(data: bytes) -> List[Tuple[int, int, str]]: # Skip .text -> .text references continue sec_name = sec_names[s.sh_info].decode("latin1") + if sec_name == ".mwcats.text": + # Skip Metrowerks CATS Utility section + continue sec_base = sections[s.sh_info].sh_offset for i in range(0, s.sh_size, s.sh_entsize): if s.sh_type == SHT_REL: @@ -1330,11 +1333,6 @@ def dump_binary( (objdump_flags + flags2, project.myimg, None), ) -DATA_POOL_PLACEHOLDER = "DATA_POOL_PLACEHOLDER-OFFSET_{}" -DATA_POOL_PLACEHOLDER_PATTERN = re.compile( - r"DATA_POOL_PLACEHOLDER-OFFSET_([a-zA-z0-9]+)" -) - # Example: "ldr r4, [pc, #56] ; (4c <AddCoins+0x4c>)" ARM32_LOAD_POOL_PATTERN = r"(ldr\s+r([0-9]|1[0-3]),\s+\[pc,.*;\s*)(\([a-fA-F0-9]+.*\))" @@ -1357,7 +1355,7 @@ class AsmProcessor: def _normalize_arch_specific(self, mnemonic: str, row: str) -> str: return row - + def post_process(self, lines: List["Line"]) -> None: return @@ -1460,37 +1458,21 @@ class AsmProcessorARM32(AsmProcessor): def _normalize_data_pool(self, row: str) -> str: pool_match = re.search(ARM32_LOAD_POOL_PATTERN, row) - if pool_match: - offset = pool_match.group(3).split(" ")[0][1:] - repl = DATA_POOL_PLACEHOLDER.format(offset) - return pool_match.group(1) + repl - return row + return pool_match.group(1) if pool_match else row def post_process(self, lines: List["Line"]) -> None: lines_by_line_number = {} for line in lines: lines_by_line_number[line.line_num] = line for line in lines: - reloc_match = re.search( - DATA_POOL_PLACEHOLDER_PATTERN, line.normalized_original - ) - if reloc_match is None: + if line.data_pool_addr is None: continue - # Get value at relocation - reloc = reloc_match.group(0) - line_number = re.search( - DATA_POOL_PLACEHOLDER_PATTERN, reloc).group(1) - line_original = lines_by_line_number[int(line_number, 16)].original + # Add data symbol and its address to the line. + line_original = lines_by_line_number[line.data_pool_addr].original value = line_original.split()[1] - - # Replace relocation placeholder with value - replaced = re.sub( - DATA_POOL_PLACEHOLDER_PATTERN, - f"={value} ({line_number})", - line.normalized_original, - ) - line.original = replaced + addr = "{:x}".format(line.data_pool_addr) + line.original = line.normalized_original + f"={value} ({addr})" class AsmProcessorAArch64(AsmProcessor): @@ -1795,6 +1777,7 @@ class Line: scorable_line: str line_num: Optional[int] = None branch_target: Optional[int] = None + data_pool_addr: Optional[int] = None source_filename: Optional[str] = None source_line_num: Optional[int] = None source_lines: List[str] = field(default_factory=list) @@ -1856,6 +1839,14 @@ def process(dump: str, config: Config) -> List[Line]: source_lines.append(row) continue + # If the instructions loads a data pool symbol, extract the address of + # the symbol. + data_pool_addr = None + pool_match = re.search(ARM32_LOAD_POOL_PATTERN, row) + if pool_match: + offset = pool_match.group(3).split(" ")[0][1:] + data_pool_addr = int(offset, 16) + m_comment = re.search(arch.re_comment, row) comment = m_comment[0] if m_comment else None row = re.sub(arch.re_comment, "", row) @@ -1946,6 +1937,7 @@ def process(dump: str, config: Config) -> List[Line]: scorable_line=scorable_line, line_num=line_num, branch_target=branch_target, + data_pool_addr=data_pool_addr, source_filename=source_filename, source_line_num=source_line_num, source_lines=source_lines, |
