diff options
| author | theo <arisstephenson2@gmail.com> | 2020-06-13 17:02:27 -0700 |
|---|---|---|
| committer | theo <arisstephenson2@gmail.com> | 2020-06-13 17:02:27 -0700 |
| commit | 66fcdf618665694fb5f5c2d3788561f4e638f167 (patch) | |
| tree | 106b704cf63fa68f2c714247958b013fcf38b0d0 /include | |
| parent | 8e1ca1936b4066fa252a14576cb5e4e79aff92b8 (diff) | |
clang-format
Diffstat (limited to 'include')
| -rw-r--r-- | include/area.h | 14 | ||||
| -rw-r--r-- | include/createEnemy.h | 2 | ||||
| -rw-r--r-- | include/cutscene.h | 14 | ||||
| -rw-r--r-- | include/entity.h | 98 | ||||
| -rw-r--r-- | include/entityData.h | 16 | ||||
| -rw-r--r-- | include/gba/defines.h | 52 | ||||
| -rw-r--r-- | include/gba/flash_internal.h | 20 | ||||
| -rw-r--r-- | include/gba/io_reg.h | 1355 | ||||
| -rw-r--r-- | include/gba/isagbprint.h | 24 | ||||
| -rw-r--r-- | include/gba/m4a_internal.h | 256 | ||||
| -rw-r--r-- | include/gba/macro.h | 238 | ||||
| -rw-r--r-- | include/gba/multi_boot.h | 107 | ||||
| -rw-r--r-- | include/gba/syscall.h | 38 | ||||
| -rw-r--r-- | include/gba/types.h | 324 | ||||
| -rw-r--r-- | include/global.h | 25 | ||||
| -rw-r--r-- | include/greatFairy.h | 30 | ||||
| -rw-r--r-- | include/item.h | 26 | ||||
| -rw-r--r-- | include/link.h | 104 | ||||
| -rw-r--r-- | include/main.h | 24 | ||||
| -rw-r--r-- | include/menu.h | 8 | ||||
| -rw-r--r-- | include/readKeyInput.h | 12 | ||||
| -rw-r--r-- | include/room.h | 48 | ||||
| -rw-r--r-- | include/screen.h | 98 | ||||
| -rw-r--r-- | include/textbox.h | 20 |
24 files changed, 1457 insertions, 1496 deletions
diff --git a/include/area.h b/include/area.h index dfcc90df..75ca58b7 100644 --- a/include/area.h +++ b/include/area.h @@ -4,13 +4,13 @@ #include "global.h" typedef struct { - u8 areaMetadata; - u32 locationIndex; - u8 unk; - u16 localFlagOffset; - u8 filler[19]; - u8 fadeOut; - u8 filler[14]; + u8 areaMetadata; + u32 locationIndex; + u8 unk; + u16 localFlagOffset; + u8 filler[19]; + u8 fadeOut; + u8 filler[14]; } Area; extern Area gArea; diff --git a/include/createEnemy.h b/include/createEnemy.h index 5812baa5..1667ec24 100644 --- a/include/createEnemy.h +++ b/include/createEnemy.h @@ -1 +1 @@ -Entity * CreateEnemy(u8, u8);
\ No newline at end of file +Entity* CreateEnemy(u8, u8);
\ No newline at end of file diff --git a/include/cutscene.h b/include/cutscene.h index eb1d03d8..d86c06b3 100644 --- a/include/cutscene.h +++ b/include/cutscene.h @@ -4,13 +4,13 @@ #include "global.h" typedef struct { - u32 *cutsceneData; - u8 textIndex; - u8 filler[11]; - u16 pauseTime; - u8 filler[2]; - s32 targetX; - s32 targetY; + u32* cutsceneData; + u8 textIndex; + u8 filler[11]; + u16 pauseTime; + u8 filler[2]; + s32 targetX; + s32 targetY; } CutsceneBehavior; #endif
\ No newline at end of file diff --git a/include/entity.h b/include/entity.h index 6b519725..7a6618e2 100644 --- a/include/entity.h +++ b/include/entity.h @@ -1,17 +1,16 @@ #include "global.h" - #ifndef ENTITY_H #define ENTITY_H typedef struct { - void *entity1; - void *entity2; - u8 filler[14]; + void* entity1; + void* entity2; + u8 filler[14]; } UnkStruct; typedef struct { - u8 type; + u8 type; u8 subtype; u8 parameter1; u8 parameter2; @@ -20,29 +19,28 @@ typedef struct { union SplitWord { s32 WORD; struct { - s16 LO, HI; + s16 LO, HI; } HALF; }; union SplitHWord { u16 HWORD; struct { - u8 LO, HI; + u8 LO, HI; } PACKED HALF; }; -typedef struct Entity -{ - u32 *field_0x0; - u32 * field_0x4; - EntityType entityType; +typedef struct Entity { + u32* field_0x0; + u32* field_0x4; + EntityType entityType; u8 action; u8 previousActionFlag; u8 parameter3; u8 field_0xf; u8 flags; - u8 scriptedScene:4; - u8 scriptedScene2:4; + u8 scriptedScene : 4; + u8 scriptedScene2 : 4; s16 spriteTileSize; u8 animationState; u8 direction; @@ -51,28 +49,28 @@ typedef struct Entity union { u8 raw; struct { - u8 ss0:2; - u8 ss2:1; - u8 ss3:1; - u8 ss4:1; - u8 ss5:1; - u8 ss6:1; - u8 ss7:1; + u8 ss0 : 2; + u8 ss2 : 1; + u8 ss3 : 1; + u8 ss4 : 1; + u8 ss5 : 1; + u8 ss6 : 1; + u8 ss7 : 1; } PACKED b; } PACKED spriteSettings; - + struct { - u8 b0:2; - u8 b1:2; - u8 b2:2; - u8 b3:2; + u8 b0 : 2; + u8 b1 : 2; + u8 b2 : 2; + u8 b3 : 2; } PACKED spriteOrder; u8 palette; struct { - u8 b0:4; - u8 b1:1; - u8 b2:3; + u8 b0 : 4; + u8 b1 : 1; + u8 b2 : 3; } PACKED spriteOrientation; u8 filler[2]; u8 animationList; @@ -81,13 +79,13 @@ typedef struct Entity s16 nonPlanarMovement; u8 spriteAnimation[3]; struct { - u8 b0:3; - u8 b1:5; + u8 b0 : 3; + u8 b1 : 5; } PACKED ticks; u16 collisions; - union SplitWord x; - union SplitWord y; - union SplitWord height; // todo + union SplitWord x; + union SplitWord y; + union SplitWord height; // todo u8 collisionLayer; s8 interactType; u8 field_0x3a; @@ -103,22 +101,22 @@ typedef struct Entity u8 field_0x44; u8 currentHealth; s16 field_0x46; - u32 * boundingBox; + u32* boundingBox; u8 field_0x4c; u8 field_0x4d; u8 field_0x4e; u8 field_0x4f; - struct Entity * parent; - struct Entity * attachedEntity; + struct Entity* parent; + struct Entity* attachedEntity; u8 field_0x58; u8 field_0x59; union { u8 all; struct { - u8 f0:1; - u8 f1:5; - u8 f2:1; - u8 f3:1; + u8 f0 : 1; + u8 f1 : 5; + u8 f2 : 1; + u8 f3 : 1; } PACKED b; } PACKED frames; u8 gfx; @@ -129,22 +127,22 @@ typedef struct Entity u16 spriteVramOffset; u8 spriteOffsetX; u8 spriteOffsetY; - u32 * otherEntity; - u8 field_0x68; + u32* otherEntity; + u8 field_0x68; u8 field_0x69; u16 field_0x6a; u8 field_0x6c; u8 field_0x6d; u8 filler4[6]; - u32 * heldObjectPtr; - u8 filler3[2]; - u16 itemCooldown; - u32 field_0x7c; - u16 field_0x80; + u32* heldObjectPtr; + u8 filler3[2]; + u16 itemCooldown; + u32 field_0x7c; + u16 field_0x80; u16 field_0x82; - union SplitHWord cutsceneBeh; + union SplitHWord cutsceneBeh; u16 field_0x86; - + } Entity; #endif diff --git a/include/entityData.h b/include/entityData.h index 086c489c..6bf62edd 100644 --- a/include/entityData.h +++ b/include/entityData.h @@ -2,13 +2,13 @@ #define ENTITYDATA_H #include "global.h" typedef struct { - u8 entityType; - u8 field_0x1; - u8 entitySubtype; - u8 entityParameter1; - u32 entityParameter2; - u16 xPos; - u16 yPos; - u32 spritePtr; + u8 entityType; + u8 field_0x1; + u8 entitySubtype; + u8 entityParameter1; + u32 entityParameter2; + u16 xPos; + u16 yPos; + u32 spritePtr; } EntityData; #endif
\ No newline at end of file diff --git a/include/gba/defines.h b/include/gba/defines.h index 765f0065..09f9b07b 100644 --- a/include/gba/defines.h +++ b/include/gba/defines.h @@ -3,7 +3,7 @@ #include <stddef.h> -#define TRUE 1 +#define TRUE 1 #define FALSE 0 #if defined(__APPLE__) @@ -20,65 +20,65 @@ #define ALIGNED(n) __attribute__((aligned(n))) -#define SOUND_INFO_PTR (*(struct SoundInfo **)0x3007FF0) -#define INTR_CHECK (*(u16 *)0x3007FF8) -#define INTR_VECTOR (*(void **)0x3007FFC) +#define SOUND_INFO_PTR (*(struct SoundInfo**)0x3007FF0) +#define INTR_CHECK (*(u16*)0x3007FF8) +#define INTR_VECTOR (*(void**)0x3007FFC) #define EWRAM_START 0x02000000 -#define EWRAM_END (EWRAM_START + 0x40000) +#define EWRAM_END (EWRAM_START + 0x40000) #define IWRAM_START 0x03000000 -#define IWRAM_END (IWRAM_START + 0x8000) +#define IWRAM_END (IWRAM_START + 0x8000) -#define PLTT 0x5000000 +#define PLTT 0x5000000 #define PLTT_SIZE 0x400 -#define BG_PLTT PLTT +#define BG_PLTT PLTT #define BG_PLTT_SIZE 0x200 -#define OBJ_PLTT (PLTT + 0x200) +#define OBJ_PLTT (PLTT + 0x200) #define OBJ_PLTT_SIZE 0x200 -#define VRAM 0x6000000 +#define VRAM 0x6000000 #define VRAM_SIZE 0x18000 -#define BG_VRAM VRAM -#define BG_VRAM_SIZE 0x10000 -#define BG_CHAR_SIZE 0x4000 -#define BG_SCREEN_SIZE 0x800 -#define BG_CHAR_ADDR(n) (void *)(BG_VRAM + (BG_CHAR_SIZE * (n))) -#define BG_SCREEN_ADDR(n) (void *)(BG_VRAM + (BG_SCREEN_SIZE * (n))) -#define BG_TILE_ADDR(n) (void *)(BG_VRAM + (0x80 * (n))) +#define BG_VRAM VRAM +#define BG_VRAM_SIZE 0x10000 +#define BG_CHAR_SIZE 0x4000 +#define BG_SCREEN_SIZE 0x800 +#define BG_CHAR_ADDR(n) (void*)(BG_VRAM + (BG_CHAR_SIZE * (n))) +#define BG_SCREEN_ADDR(n) (void*)(BG_VRAM + (BG_SCREEN_SIZE * (n))) +#define BG_TILE_ADDR(n) (void*)(BG_VRAM + (0x80 * (n))) #define BG_TILE_H_FLIP(n) (0x400 + (n)) #define BG_TILE_V_FLIP(n) (0x800 + (n)) // text-mode BG -#define OBJ_VRAM0 (void *)(VRAM + 0x10000) +#define OBJ_VRAM0 (void*)(VRAM + 0x10000) #define OBJ_VRAM0_SIZE 0x8000 // bitmap-mode BG -#define OBJ_VRAM1 (void *)(VRAM + 0x14000) +#define OBJ_VRAM1 (void*)(VRAM + 0x14000) #define OBJ_VRAM1_SIZE 0x4000 -#define OAM 0x7000000 +#define OAM 0x7000000 #define OAM_SIZE 0x400 -#define ROM_HEADER_SIZE 0xC0 +#define ROM_HEADER_SIZE 0xC0 -#define DISPLAY_WIDTH 240 +#define DISPLAY_WIDTH 240 #define DISPLAY_HEIGHT 160 #define TILE_SIZE_4BPP 32 #define TILE_SIZE_8BPP 64 -#define TILE_OFFSET_4BPP(n) ((n) * TILE_SIZE_4BPP) -#define TILE_OFFSET_8BPP(n) ((n) * TILE_SIZE_8BPP) +#define TILE_OFFSET_4BPP(n) ((n)*TILE_SIZE_4BPP) +#define TILE_OFFSET_8BPP(n) ((n)*TILE_SIZE_8BPP) #define TOTAL_OBJ_TILE_COUNT 1024 #define RGB(r, g, b) ((r) | ((g) << 5) | ((b) << 10)) #define RGB2(r, g, b) (((b) << 10) | ((g) << 5) | (r)) -#define _RGB(r, g, b) ((((b) & 0x1F) << 10) + (((g) & 0x1F) << 5) + ((r) & 0x1F)) +#define _RGB(r, g, b) ((((b)&0x1F) << 10) + (((g)&0x1F) << 5) + ((r)&0x1F)) #define RGB_BLACK RGB(0, 0, 0) #define RGB_WHITE RGB(31, 31, 31) @@ -90,6 +90,6 @@ #define RGB_CYAN RGB(0, 31, 31) #define RGB_WHITEALPHA (RGB_WHITE | 0x8000) -#define SYSTEM_CLOCK (16 * 1024 * 1024) // System Clock +#define SYSTEM_CLOCK (16 * 1024 * 1024) // System Clock #endif // GUARD_GBA_DEFINES diff --git a/include/gba/flash_internal.h b/include/gba/flash_internal.h index a4770882..09f3f79c 100644 --- a/include/gba/flash_internal.h +++ b/include/gba/flash_internal.h @@ -1,16 +1,15 @@ #ifndef GUARD_GBA_FLASH_INTERNAL_H #define GUARD_GBA_FLASH_INTERNAL_H -#define FLASH_BASE ((u8 *)0xE000000) +#define FLASH_BASE ((u8*)0xE000000) -#define FLASH_WRITE(addr, data) ((*(vu8 *)(FLASH_BASE + (addr))) = (data)) +#define FLASH_WRITE(addr, data) ((*(vu8*)(FLASH_BASE + (addr))) = (data)) #define FLASH_ROM_SIZE_1M 131072 // 1 megabit ROM #define SECTORS_PER_BANK 16 -struct FlashSector -{ +struct FlashSector { u32 size; u8 shift; u16 count; @@ -25,21 +24,20 @@ struct FlashType { // TODO: add support for anonymous unions/structs if possible union { struct { - u8 makerId; - u8 deviceId; + u8 makerId; + u8 deviceId; } separate; u16 joined; } ids; }; -struct FlashSetupInfo -{ +struct FlashSetupInfo { u16 (*programFlashByte)(u16, u32, u8); - u16 (*programFlashSector)(u16, void *); + u16 (*programFlashSector)(u16, void*); u16 (*eraseFlashChip)(void); u16 (*eraseFlashSector)(u16); - u16 (*WaitForFlashWrite)(u8, u8 *, u8); - const u16 *maxTime; + u16 (*WaitForFlashWrite)(u8, u8*, u8); + const u16* maxTime; struct FlashType type; }; diff --git a/include/gba/io_reg.h b/include/gba/io_reg.h index e331da40..a66467f0 100644 --- a/include/gba/io_reg.h +++ b/include/gba/io_reg.h @@ -5,600 +5,601 @@ // I/O register offsets -#define REG_OFFSET_DISPCNT 0x0 -#define REG_OFFSET_DISPSTAT 0x4 -#define REG_OFFSET_VCOUNT 0x6 -#define REG_OFFSET_BG0CNT 0x8 -#define REG_OFFSET_BG1CNT 0xa -#define REG_OFFSET_BG2CNT 0xc -#define REG_OFFSET_BG3CNT 0xe -#define REG_OFFSET_BG0HOFS 0x10 -#define REG_OFFSET_BG0VOFS 0x12 -#define REG_OFFSET_BG1HOFS 0x14 -#define REG_OFFSET_BG1VOFS 0x16 -#define REG_OFFSET_BG2HOFS 0x18 -#define REG_OFFSET_BG2VOFS 0x1a -#define REG_OFFSET_BG3HOFS 0x1c -#define REG_OFFSET_BG3VOFS 0x1e -#define REG_OFFSET_BG2PA 0x20 -#define REG_OFFSET_BG2PB 0x22 -#define REG_OFFSET_BG2PC 0x24 -#define REG_OFFSET_BG2PD 0x26 -#define REG_OFFSET_BG2X 0x28 -#define REG_OFFSET_BG2X_L 0x28 -#define REG_OFFSET_BG2X_H 0x2a -#define REG_OFFSET_BG2Y 0x2c -#define REG_OFFSET_BG2Y_L 0x2c -#define REG_OFFSET_BG2Y_H 0x2e -#define REG_OFFSET_BG3PA 0x30 -#define REG_OFFSET_BG3PB 0x32 -#define REG_OFFSET_BG3PC 0x34 -#define REG_OFFSET_BG3PD 0x36 -#define REG_OFFSET_BG3X 0x38 -#define REG_OFFSET_BG3X_L 0x38 -#define REG_OFFSET_BG3X_H 0x3a -#define REG_OFFSET_BG3Y 0x3c -#define REG_OFFSET_BG3Y_L 0x3c -#define REG_OFFSET_BG3Y_H 0x3e -#define REG_OFFSET_WIN0H 0x40 -#define REG_OFFSET_WIN1H 0x42 -#define REG_OFFSET_WIN0V 0x44 -#define REG_OFFSET_WIN1V 0x46 -#define REG_OFFSET_WININ 0x48 -#define REG_OFFSET_WINOUT 0x4a -#define REG_OFFSET_MOSAIC 0x4c -#define REG_OFFSET_BLDCNT 0x50 -#define REG_OFFSET_BLDALPHA 0x52 -#define REG_OFFSET_BLDY 0x54 +#define REG_OFFSET_DISPCNT 0x0 +#define REG_OFFSET_DISPSTAT 0x4 +#define REG_OFFSET_VCOUNT 0x6 +#define REG_OFFSET_BG0CNT 0x8 +#define REG_OFFSET_BG1CNT 0xa +#define REG_OFFSET_BG2CNT 0xc +#define REG_OFFSET_BG3CNT 0xe +#define REG_OFFSET_BG0HOFS 0x10 +#define REG_OFFSET_BG0VOFS 0x12 +#define REG_OFFSET_BG1HOFS 0x14 +#define REG_OFFSET_BG1VOFS 0x16 +#define REG_OFFSET_BG2HOFS 0x18 +#define REG_OFFSET_BG2VOFS 0x1a +#define REG_OFFSET_BG3HOFS 0x1c +#define REG_OFFSET_BG3VOFS 0x1e +#define REG_OFFSET_BG2PA 0x20 +#define REG_OFFSET_BG2PB 0x22 +#define REG_OFFSET_BG2PC 0x24 +#define REG_OFFSET_BG2PD 0x26 +#define REG_OFFSET_BG2X 0x28 +#define REG_OFFSET_BG2X_L 0x28 +#define REG_OFFSET_BG2X_H 0x2a +#define REG_OFFSET_BG2Y 0x2c +#define REG_OFFSET_BG2Y_L 0x2c +#define REG_OFFSET_BG2Y_H 0x2e +#define REG_OFFSET_BG3PA 0x30 +#define REG_OFFSET_BG3PB 0x32 +#define REG_OFFSET_BG3PC 0x34 +#define REG_OFFSET_BG3PD 0x36 +#define REG_OFFSET_BG3X 0x38 +#define REG_OFFSET_BG3X_L 0x38 +#define REG_OFFSET_BG3X_H 0x3a +#define REG_OFFSET_BG3Y 0x3c +#define REG_OFFSET_BG3Y_L 0x3c +#define REG_OFFSET_BG3Y_H 0x3e +#define REG_OFFSET_WIN0H 0x40 +#define REG_OFFSET_WIN1H 0x42 +#define REG_OFFSET_WIN0V 0x44 +#define REG_OFFSET_WIN1V 0x46 +#define REG_OFFSET_WININ 0x48 +#define REG_OFFSET_WINOUT 0x4a +#define REG_OFFSET_MOSAIC 0x4c +#define REG_OFFSET_BLDCNT 0x50 +#define REG_OFFSET_BLDALPHA 0x52 +#define REG_OFFSET_BLDY 0x54 #define REG_OFFSET_SOUND1CNT_L 0x60 -#define REG_OFFSET_NR10 0x60 +#define REG_OFFSET_NR10 0x60 #define REG_OFFSET_SOUND1CNT_H 0x62 -#define REG_OFFSET_NR11 0x62 -#define REG_OFFSET_NR12 0x63 +#define REG_OFFSET_NR11 0x62 +#define REG_OFFSET_NR12 0x63 #define REG_OFFSET_SOUND1CNT_X 0x64 -#define REG_OFFSET_NR13 0x64 -#define REG_OFFSET_NR14 0x65 +#define REG_OFFSET_NR13 0x64 +#define REG_OFFSET_NR14 0x65 #define REG_OFFSET_SOUND2CNT_L 0x68 -#define REG_OFFSET_NR21 0x68 -#define REG_OFFSET_NR22 0x69 +#define REG_OFFSET_NR21 0x68 +#define REG_OFFSET_NR22 0x69 #define REG_OFFSET_SOUND2CNT_H 0x6c -#define REG_OFFSET_NR23 0x6c -#define REG_OFFSET_NR24 0x6d +#define REG_OFFSET_NR23 0x6c +#define REG_OFFSET_NR24 0x6d #define REG_OFFSET_SOUND3CNT_L 0x70 -#define REG_OFFSET_NR30 0x70 +#define REG_OFFSET_NR30 0x70 #define REG_OFFSET_SOUND3CNT_H 0x72 -#define REG_OFFSET_NR31 0x72 -#define REG_OFFSET_NR32 0x73 +#define REG_OFFSET_NR31 0x72 +#define REG_OFFSET_NR32 0x73 #define REG_OFFSET_SOUND3CNT_X 0x74 -#define REG_OFFSET_NR33 0x74 -#define REG_OFFSET_NR34 0x75 +#define REG_OFFSET_NR33 0x74 +#define REG_OFFSET_NR34 0x75 #define REG_OFFSET_SOUND4CNT_L 0x78 -#define REG_OFFSET_NR41 0x78 -#define REG_OFFSET_NR42 0x79 +#define REG_OFFSET_NR41 0x78 +#define REG_OFFSET_NR42 0x79 #define REG_OFFSET_SOUND4CNT_H 0x7c -#define REG_OFFSET_NR43 0x7c -#define REG_OFFSET_NR44 0x7d -#define REG_OFFSET_SOUNDCNT_L 0x80 -#define REG_OFFSET_NR50 0x80 -#define REG_OFFSET_NR51 0x81 -#define REG_OFFSET_SOUNDCNT_H 0x82 -#define REG_OFFSET_SOUNDCNT_X 0x84 -#define REG_OFFSET_NR52 0x84 -#define REG_OFFSET_SOUNDBIAS 0x88 +#define REG_OFFSET_NR43 0x7c +#define REG_OFFSET_NR44 0x7d +#define REG_OFFSET_SOUNDCNT_L 0x80 +#define REG_OFFSET_NR50 0x80 +#define REG_OFFSET_NR51 0x81 +#define REG_OFFSET_SOUNDCNT_H 0x82 +#define REG_OFFSET_SOUNDCNT_X 0x84 +#define REG_OFFSET_NR52 0x84 +#define REG_OFFSET_SOUNDBIAS 0x88 #define REG_OFFSET_SOUNDBIAS_L 0x88 #define REG_OFFSET_SOUNDBIAS_H 0x89 -#define REG_OFFSET_WAVE_RAM0 0x90 -#define REG_OFFSET_WAVE_RAM1 0x94 -#define REG_OFFSET_WAVE_RAM2 0x98 -#define REG_OFFSET_WAVE_RAM3 0x9c -#define REG_OFFSET_FIFO_A 0xa0 -#define REG_OFFSET_FIFO_B 0xa4 - -#define REG_OFFSET_DMA0 0xb0 -#define REG_OFFSET_DMA0SAD 0xb0 -#define REG_OFFSET_DMA0SAD_L 0xb0 -#define REG_OFFSET_DMA0SAD_H 0xb2 -#define REG_OFFSET_DMA0DAD 0xb4 -#define REG_OFFSET_DMA0DAD_L 0xb4 -#define REG_OFFSET_DMA0DAD_H 0xb6 -#define REG_OFFSET_DMA0CNT 0xb8 -#define REG_OFFSET_DMA0CNT_L 0xb8 -#define REG_OFFSET_DMA0CNT_H 0xba -#define REG_OFFSET_DMA1 0xbc -#define REG_OFFSET_DMA1SAD 0xbc -#define REG_OFFSET_DMA1SAD_L 0xbc -#define REG_OFFSET_DMA1SAD_H 0xbe -#define REG_OFFSET_DMA1DAD 0xc0 -#define REG_OFFSET_DMA1DAD_L 0xc0 -#define REG_OFFSET_DMA1DAD_H 0xc2 -#define REG_OFFSET_DMA1CNT 0xc4 -#define REG_OFFSET_DMA1CNT_L 0xc4 -#define REG_OFFSET_DMA1CNT_H 0xc6 -#define REG_OFFSET_DMA2 0xc8 -#define REG_OFFSET_DMA2SAD 0xc8 -#define REG_OFFSET_DMA2SAD_L 0xc8 -#define REG_OFFSET_DMA2SAD_H 0xca -#define REG_OFFSET_DMA2DAD 0xcc -#define REG_OFFSET_DMA2DAD_L 0xcc -#define REG_OFFSET_DMA2DAD_H 0xce -#define REG_OFFSET_DMA2CNT 0xd0 -#define REG_OFFSET_DMA2CNT_L 0xd0 -#define REG_OFFSET_DMA2CNT_H 0xd2 -#define REG_OFFSET_DMA3 0xd4 -#define REG_OFFSET_DMA3SAD 0xd4 -#define REG_OFFSET_DMA3SAD_L 0xd4 -#define REG_OFFSET_DMA3SAD_H 0xd6 -#define REG_OFFSET_DMA3DAD 0xd8 -#define REG_OFFSET_DMA3DAD_L 0xd8 -#define REG_OFFSET_DMA3DAD_H 0xda -#define REG_OFFSET_DMA3CNT 0xdc -#define REG_OFFSET_DMA3CNT_L 0xdc -#define REG_OFFSET_DMA3CNT_H 0xde - -#define REG_OFFSET_TMCNT 0x100 -#define REG_OFFSET_TMCNT_L 0x100 -#define REG_OFFSET_TMCNT_H 0x102 -#define REG_OFFSET_TM0CNT 0x100 -#define REG_OFFSET_TM0CNT_L 0x100 -#define REG_OFFSET_TM0CNT_H 0x102 -#define REG_OFFSET_TM1CNT 0x104 -#define REG_OFFSET_TM1CNT_L 0x104 -#define REG_OFFSET_TM1CNT_H 0x106 -#define REG_OFFSET_TM2CNT 0x108 -#define REG_OFFSET_TM2CNT_L 0x108 -#define REG_OFFSET_TM2CNT_H 0x10a -#define REG_OFFSET_TM3CNT 0x10c -#define REG_OFFSET_TM3CNT_L 0x10c -#define REG_OFFSET_TM3CNT_H 0x10e - -#define REG_OFFSET_SIOCNT 0x128 -#define REG_OFFSET_SIODATA8 0x12a -#define REG_OFFSET_SIODATA32 0x120 +#define REG_OFFSET_WAVE_RAM0 0x90 +#define REG_OFFSET_WAVE_RAM1 0x94 +#define REG_OFFSET_WAVE_RAM2 0x98 +#define REG_OFFSET_WAVE_RAM3 0x9c +#define REG_OFFSET_FIFO_A 0xa0 +#define REG_OFFSET_FIFO_B 0xa4 + +#define REG_OFFSET_DMA0 0xb0 +#define REG_OFFSET_DMA0SAD 0xb0 +#define REG_OFFSET_DMA0SAD_L 0xb0 +#define REG_OFFSET_DMA0SAD_H 0xb2 +#define REG_OFFSET_DMA0DAD 0xb4 +#define REG_OFFSET_DMA0DAD_L 0xb4 +#define REG_OFFSET_DMA0DAD_H 0xb6 +#define REG_OFFSET_DMA0CNT 0xb8 +#define REG_OFFSET_DMA0CNT_L 0xb8 +#define REG_OFFSET_DMA0CNT_H 0xba +#define REG_OFFSET_DMA1 0xbc +#define REG_OFFSET_DMA1SAD 0xbc +#define REG_OFFSET_DMA1SAD_L 0xbc +#define REG_OFFSET_DMA1SAD_H 0xbe +#define REG_OFFSET_DMA1DAD 0xc0 +#define REG_OFFSET_DMA1DAD_L 0xc0 +#define REG_OFFSET_DMA1DAD_H 0xc2 +#define REG_OFFSET_DMA1CNT 0xc4 +#define REG_OFFSET_DMA1CNT_L 0xc4 +#define REG_OFFSET_DMA1CNT_H 0xc6 +#define REG_OFFSET_DMA2 0xc8 +#define REG_OFFSET_DMA2SAD 0xc8 +#define REG_OFFSET_DMA2SAD_L 0xc8 +#define REG_OFFSET_DMA2SAD_H 0xca +#define REG_OFFSET_DMA2DAD 0xcc +#define REG_OFFSET_DMA2DAD_L 0xcc +#define REG_OFFSET_DMA2DAD_H 0xce +#define REG_OFFSET_DMA2CNT 0xd0 +#define REG_OFFSET_DMA2CNT_L 0xd0 +#define REG_OFFSET_DMA2CNT_H 0xd2 +#define REG_OFFSET_DMA3 0xd4 +#define REG_OFFSET_DMA3SAD 0xd4 +#define REG_OFFSET_DMA3SAD_L 0xd4 +#define REG_OFFSET_DMA3SAD_H 0xd6 +#define REG_OFFSET_DMA3DAD 0xd8 +#define REG_OFFSET_DMA3DAD_L 0xd8 +#define REG_OFFSET_DMA3DAD_H 0xda +#define REG_OFFSET_DMA3CNT 0xdc +#define REG_OFFSET_DMA3CNT_L 0xdc +#define REG_OFFSET_DMA3CNT_H 0xde + +#define REG_OFFSET_TMCNT 0x100 +#define REG_OFFSET_TMCNT_L 0x100 +#define REG_OFFSET_TMCNT_H 0x102 +#define REG_OFFSET_TM0CNT 0x100 +#define REG_OFFSET_TM0CNT_L 0x100 +#define REG_OFFSET_TM0CNT_H 0x102 +#define REG_OFFSET_TM1CNT 0x104 +#define REG_OFFSET_TM1CNT_L 0x104 +#define REG_OFFSET_TM1CNT_H 0x106 +#define REG_OFFSET_TM2CNT 0x108 +#define REG_OFFSET_TM2CNT_L 0x108 +#define REG_OFFSET_TM2CNT_H 0x10a +#define REG_OFFSET_TM3CNT 0x10c +#define REG_OFFSET_TM3CNT_L 0x10c +#define REG_OFFSET_TM3CNT_H 0x10e + +#define REG_OFFSET_SIOCNT 0x128 +#define REG_OFFSET_SIODATA8 0x12a +#define REG_OFFSET_SIODATA32 0x120 #define REG_OFFSET_SIOMLT_SEND 0x12a #define REG_OFFSET_SIOMLT_RECV 0x120 -#define REG_OFFSET_SIOMULTI0 0x120 -#define REG_OFFSET_SIOMULTI1 0x122 -#define REG_OFFSET_SIOMULTI2 0x124 -#define REG_OFFSET_SIOMULTI3 0x126 - -#define REG_OFFSET_KEYINPUT 0x130 -#define REG_OFFSET_KEYCNT 0x132 - -#define REG_OFFSET_RCNT 0x134 - -#define REG_OFFSET_JOYCNT 0x140 -#define REG_OFFSET_JOYSTAT 0x158 -#define REG_OFFSET_JOY_RECV 0x150 -#define REG_OFFSET_JOY_RECV_L 0x150 -#define REG_OFFSET_JOY_RECV_H 0x152 -#define REG_OFFSET_JOY_TRANS 0x154 +#define REG_OFFSET_SIOMULTI0 0x120 +#define REG_OFFSET_SIOMULTI1 0x122 +#define REG_OFFSET_SIOMULTI2 0x124 +#define REG_OFFSET_SIOMULTI3 0x126 + +#define REG_OFFSET_KEYINPUT 0x130 +#define REG_OFFSET_KEYCNT 0x132 + +#define REG_OFFSET_RCNT 0x134 + +#define REG_OFFSET_JOYCNT 0x140 +#define REG_OFFSET_JOYSTAT 0x158 +#define REG_OFFSET_JOY_RECV 0x150 +#define REG_OFFSET_JOY_RECV_L 0x150 +#define REG_OFFSET_JOY_RECV_H 0x152 +#define REG_OFFSET_JOY_TRANS 0x154 #define REG_OFFSET_JOY_TRANS_L 0x154 #define REG_OFFSET_JOY_TRANS_H 0x156 -#define REG_OFFSET_IME 0x208 -#define REG_OFFSET_IE 0x200 -#define REG_OFFSET_IF 0x202 +#define REG_OFFSET_IME 0x208 +#define REG_OFFSET_IE 0x200 +#define REG_OFFSET_IF 0x202 -#define REG_OFFSET_WAITCNT 0x204 +#define REG_OFFSET_WAITCNT 0x204 // I/O register addresses -#define REG_ADDR_DISPCNT (REG_BASE + REG_OFFSET_DISPCNT) -#define REG_ADDR_DISPSTAT (REG_BASE + REG_OFFSET_DISPSTAT) -#define REG_ADDR_VCOUNT (REG_BASE + REG_OFFSET_VCOUNT) -#define REG_ADDR_BG0CNT (REG_BASE + REG_OFFSET_BG0CNT) -#define REG_ADDR_BG1CNT (REG_BASE + REG_OFFSET_BG1CNT) -#define REG_ADDR_BG2CNT (REG_BASE + REG_OFFSET_BG2CNT) -#define REG_ADDR_BG3CNT (REG_BASE + REG_OFFSET_BG3CNT) -#define REG_ADDR_BG0HOFS (REG_BASE + REG_OFFSET_BG0HOFS) -#define REG_ADDR_BG0VOFS (REG_BASE + REG_OFFSET_BG0VOFS) -#define REG_ADDR_BG1HOFS (REG_BASE + REG_OFFSET_BG1HOFS) -#define REG_ADDR_BG1VOFS (REG_BASE + REG_OFFSET_BG1VOFS) -#define REG_ADDR_BG2HOFS (REG_BASE + REG_OFFSET_BG2HOFS) -#define REG_ADDR_BG2VOFS (REG_BASE + REG_OFFSET_BG2VOFS) -#define REG_ADDR_BG3HOFS (REG_BASE + REG_OFFSET_BG3HOFS) -#define REG_ADDR_BG3VOFS (REG_BASE + REG_OFFSET_BG3VOFS) -#define REG_ADDR_BG2PA (REG_BASE + REG_OFFSET_BG2PA) -#define REG_ADDR_BG2PB (REG_BASE + REG_OFFSET_BG2PB) -#define REG_ADDR_BG2PC (REG_BASE + REG_OFFSET_BG2PC) -#define REG_ADDR_BG2PD (REG_BASE + REG_OFFSET_BG2PD) -#define REG_ADDR_BG2X (REG_BASE + REG_OFFSET_BG2X) -#define REG_ADDR_BG2X_L (REG_BASE + REG_OFFSET_BG2X_L) -#define REG_ADDR_BG2X_H (REG_BASE + REG_OFFSET_BG2X_H) -#define REG_ADDR_BG2Y (REG_BASE + REG_OFFSET_BG2Y) -#define REG_ADDR_BG2Y_L (REG_BASE + REG_OFFSET_BG2Y_L) -#define REG_ADDR_BG2Y_H (REG_BASE + REG_OFFSET_BG2Y_H) -#define REG_ADDR_BG3PA (REG_BASE + REG_OFFSET_BG3PA) -#define REG_ADDR_BG3PB (REG_BASE + REG_OFFSET_BG3PB) -#define REG_ADDR_BG3PC (REG_BASE + REG_OFFSET_BG3PC) -#define REG_ADDR_BG3PD (REG_BASE + REG_OFFSET_BG3PD) -#define REG_ADDR_BG3X (REG_BASE + REG_OFFSET_BG3X) -#define REG_ADDR_BG3X_L (REG_BASE + REG_OFFSET_BG3X_L) -#define REG_ADDR_BG3X_H (REG_BASE + REG_OFFSET_BG3X_H) -#define REG_ADDR_BG3Y (REG_BASE + REG_OFFSET_BG3Y) -#define REG_ADDR_BG3Y_L (REG_BASE + REG_OFFSET_BG3Y_L) -#define REG_ADDR_BG3Y_H (REG_BASE + REG_OFFSET_BG3Y_H) -#define REG_ADDR_WIN0H (REG_BASE + REG_OFFSET_WIN0H) -#define REG_ADDR_WIN1H (REG_BASE + REG_OFFSET_WIN1H) -#define REG_ADDR_WIN0V (REG_BASE + REG_OFFSET_WIN0V) -#define REG_ADDR_WIN1V (REG_BASE + REG_OFFSET_WIN1V) -#define REG_ADDR_WININ (REG_BASE + REG_OFFSET_WININ) -#define REG_ADDR_WINOUT (REG_BASE + REG_OFFSET_WINOUT) -#define REG_ADDR_MOSAIC (REG_BASE + REG_OFFSET_MOSAIC) -#define REG_ADDR_BLDCNT (REG_BASE + REG_OFFSET_BLDCNT) -#define REG_ADDR_BLDALPHA (REG_BASE + REG_OFFSET_BLDALPHA) -#define REG_ADDR_BLDY (REG_BASE + REG_OFFSET_BLDY) +#define REG_ADDR_DISPCNT (REG_BASE + REG_OFFSET_DISPCNT) +#define REG_ADDR_DISPSTAT (REG_BASE + REG_OFFSET_DISPSTAT) +#define REG_ADDR_VCOUNT (REG_BASE + REG_OFFSET_VCOUNT) +#define REG_ADDR_BG0CNT (REG_BASE + REG_OFFSET_BG0CNT) +#define REG_ADDR_BG1CNT (REG_BASE + REG_OFFSET_BG1CNT) +#define REG_ADDR_BG2CNT (REG_BASE + REG_OFFSET_BG2CNT) +#define REG_ADDR_BG3CNT (REG_BASE + REG_OFFSET_BG3CNT) +#define REG_ADDR_BG0HOFS (REG_BASE + REG_OFFSET_BG0HOFS) +#define REG_ADDR_BG0VOFS (REG_BASE + REG_OFFSET_BG0VOFS) +#define REG_ADDR_BG1HOFS (REG_BASE + REG_OFFSET_BG1HOFS) +#define REG_ADDR_BG1VOFS (REG_BASE + REG_OFFSET_BG1VOFS) +#define REG_ADDR_BG2HOFS (REG_BASE + REG_OFFSET_BG2HOFS) +#define REG_ADDR_BG2VOFS (REG_BASE + REG_OFFSET_BG2VOFS) +#define REG_ADDR_BG3HOFS (REG_BASE + REG_OFFSET_BG3HOFS) +#define REG_ADDR_BG3VOFS (REG_BASE + REG_OFFSET_BG3VOFS) +#define REG_ADDR_BG2PA (REG_BASE + REG_OFFSET_BG2PA) +#define REG_ADDR_BG2PB (REG_BASE + REG_OFFSET_BG2PB) +#define REG_ADDR_BG2PC (REG_BASE + REG_OFFSET_BG2PC) +#define REG_ADDR_BG2PD (REG_BASE + REG_OFFSET_BG2PD) +#define REG_ADDR_BG2X (REG_BASE + REG_OFFSET_BG2X) +#define REG_ADDR_BG2X_L (REG_BASE + REG_OFFSET_BG2X_L) +#define REG_ADDR_BG2X_H (REG_BASE + REG_OFFSET_BG2X_H) +#define REG_ADDR_BG2Y (REG_BASE + REG_OFFSET_BG2Y) +#define REG_ADDR_BG2Y_L (REG_BASE + REG_OFFSET_BG2Y_L) +#define REG_ADDR_BG2Y_H (REG_BASE + REG_OFFSET_BG2Y_H) +#define REG_ADDR_BG3PA (REG_BASE + REG_OFFSET_BG3PA) +#define REG_ADDR_BG3PB (REG_BASE + REG_OFFSET_BG3PB) +#define REG_ADDR_BG3PC (REG_BASE + REG_OFFSET_BG3PC) +#define REG_ADDR_BG3PD (REG_BASE + REG_OFFSET_BG3PD) +#define REG_ADDR_BG3X (REG_BASE + REG_OFFSET_BG3X) +#define REG_ADDR_BG3X_L (REG_BASE + REG_OFFSET_BG3X_L) +#define REG_ADDR_BG3X_H (REG_BASE + REG_OFFSET_BG3X_H) +#define REG_ADDR_BG3Y (REG_BASE + REG_OFFSET_BG3Y) +#define REG_ADDR_BG3Y_L (REG_BASE + REG_OFFSET_BG3Y_L) +#define REG_ADDR_BG3Y_H (REG_BASE + REG_OFFSET_BG3Y_H) +#define REG_ADDR_WIN0H (REG_BASE + REG_OFFSET_WIN0H) +#define REG_ADDR_WIN1H (REG_BASE + REG_OFFSET_WIN1H) +#define REG_ADDR_WIN0V (REG_BASE + REG_OFFSET_WIN0V) +#define REG_ADDR_WIN1V (REG_BASE + REG_OFFSET_WIN1V) +#define REG_ADDR_WININ (REG_BASE + REG_OFFSET_WININ) +#define REG_ADDR_WINOUT (REG_BASE + REG_OFFSET_WINOUT) +#define REG_ADDR_MOSAIC (REG_BASE + REG_OFFSET_MOSAIC) +#define REG_ADDR_BLDCNT (REG_BASE + REG_OFFSET_BLDCNT) +#define REG_ADDR_BLDALPHA (REG_BASE + REG_OFFSET_BLDALPHA) +#define REG_ADDR_BLDY (REG_BASE + REG_OFFSET_BLDY) #define REG_ADDR_SOUND1CNT_L (REG_BASE + REG_OFFSET_SOUND1CNT_L) -#define REG_ADDR_NR10 (REG_BASE + REG_OFFSET_NR10) +#define REG_ADDR_NR10 (REG_BASE + REG_OFFSET_NR10) #define REG_ADDR_SOUND1CNT_H (REG_BASE + REG_OFFSET_SOUND1CNT_H) -#define REG_ADDR_NR11 (REG_BASE + REG_OFFSET_NR11) -#define REG_ADDR_NR12 (REG_BASE + REG_OFFSET_NR12) +#define REG_ADDR_NR11 (REG_BASE + REG_OFFSET_NR11) +#define REG_ADDR_NR12 (REG_BASE + REG_OFFSET_NR12) #define REG_ADDR_SOUND1CNT_X (REG_BASE + REG_OFFSET_SOUND1CNT_X) -#define REG_ADDR_NR13 (REG_BASE + REG_OFFSET_NR13) -#define REG_ADDR_NR14 (REG_BASE + REG_OFFSET_NR14) +#define REG_ADDR_NR13 (REG_BASE + REG_OFFSET_NR13) +#define REG_ADDR_NR14 (REG_BASE + REG_OFFSET_NR14) #define REG_ADDR_SOUND2CNT_L (REG_BASE + REG_OFFSET_SOUND2CNT_L) -#define REG_ADDR_NR21 (REG_BASE + REG_OFFSET_NR21) -#define REG_ADDR_NR22 (REG_BASE + REG_OFFSET_NR22) +#define REG_ADDR_NR21 (REG_BASE + REG_OFFSET_NR21) +#define REG_ADDR_NR22 (REG_BASE + REG_OFFSET_NR22) #define REG_ADDR_SOUND2CNT_H (REG_BASE + REG_OFFSET_SOUND2CNT_H) -#define REG_ADDR_NR23 (REG_BASE + REG_OFFSET_NR23) -#define REG_ADDR_NR24 (REG_BASE + REG_OFFSET_NR24) +#define REG_ADDR_NR23 (REG_BASE + REG_OFFSET_NR23) +#define REG_ADDR_NR24 (REG_BASE + REG_OFFSET_NR24) #define REG_ADDR_SOUND3CNT_L (REG_BASE + REG_OFFSET_SOUND3CNT_L) -#define REG_ADDR_NR30 (REG_BASE + REG_OFFSET_NR30) +#define REG_ADDR_NR30 (REG_BASE + REG_OFFSET_NR30) #define REG_ADDR_SOUND3CNT_H (REG_BASE + REG_OFFSET_SOUND3CNT_H) -#define REG_ADDR_NR31 (REG_BASE + REG_OFFSET_NR31) -#define REG_ADDR_NR32 (REG_BASE + REG_OFFSET_NR32) +#define REG_ADDR_NR31 (REG_BASE + REG_OFFSET_NR31) +#define REG_ADDR_NR32 (REG_BASE + REG_OFFSET_NR32) #define REG_ADDR_SOUND3CNT_X (REG_BASE + REG_OFFSET_SOUND3CNT_X) -#define REG_ADDR_NR33 (REG_BASE + REG_OFFSET_NR33) -#define REG_ADDR_NR34 (REG_BASE + REG_OFFSET_NR34) +#define REG_ADDR_NR33 (REG_BASE + REG_OFFSET_NR33) +#define REG_ADDR_NR34 (REG_BASE + REG_OFFSET_NR34) #define REG_ADDR_SOUND4CNT_L (REG_BASE + REG_OFFSET_SOUND4CNT_L) -#define REG_ADDR_NR41 (REG_BASE + REG_OFFSET_NR41) -#define REG_ADDR_NR42 (REG_BASE + REG_OFFSET_NR42) +#define REG_ADDR_NR41 (REG_BASE + REG_OFFSET_NR41) +#define REG_ADDR_NR42 (REG_BASE + REG_OFFSET_NR42) #define REG_ADDR_SOUND4CNT_H (REG_BASE + REG_OFFSET_SOUND4CNT_H) -#define REG_ADDR_NR43 (REG_BASE + REG_OFFSET_NR43) -#define REG_ADDR_NR44 (REG_BASE + REG_OFFSET_NR44) -#define REG_ADDR_SOUNDCNT_L (REG_BASE + REG_OFFSET_SOUNDCNT_L) -#define REG_ADDR_NR50 (REG_BASE + REG_OFFSET_NR50) -#define REG_ADDR_NR51 (REG_BASE + REG_OFFSET_NR51) -#define REG_ADDR_SOUNDCNT_H (REG_BASE + REG_OFFSET_SOUNDCNT_H) -#define REG_ADDR_SOUNDCNT_X (REG_BASE + REG_OFFSET_SOUNDCNT_X) -#define REG_ADDR_NR52 (REG_BASE + REG_OFFSET_NR52) -#define REG_ADDR_SOUNDBIAS (REG_BASE + REG_OFFSET_SOUNDBIAS) +#define REG_ADDR_NR43 (REG_BASE + REG_OFFSET_NR43) +#define REG_ADDR_NR44 (REG_BASE + REG_OFFSET_NR44) +#define REG_ADDR_SOUNDCNT_L (REG_BASE + REG_OFFSET_SOUNDCNT_L) +#define REG_ADDR_NR50 (REG_BASE + REG_OFFSET_NR50) +#define REG_ADDR_NR51 (REG_BASE + REG_OFFSET_NR51) +#define REG_ADDR_SOUNDCNT_H (REG_BASE + REG_OFFSET_SOUNDCNT_H) +#define REG_ADDR_SOUNDCNT_X (REG_BASE + REG_OFFSET_SOUNDCNT_X) +#define REG_ADDR_NR52 (REG_BASE + REG_OFFSET_NR52) +#define REG_ADDR_SOUNDBIAS (REG_BASE + REG_OFFSET_SOUNDBIAS) #define REG_ADDR_SOUNDBIAS_L (REG_BASE + REG_OFFSET_SOUNDBIAS_L) #define REG_ADDR_SOUNDBIAS_H (REG_BASE + REG_OFFSET_SOUNDBIAS_H) -#define REG_ADDR_WAVE_RAM0 (REG_BASE + REG_OFFSET_WAVE_RAM0) -#define REG_ADDR_WAVE_RAM1 (REG_BASE + REG_OFFSET_WAVE_RAM1) -#define REG_ADDR_WAVE_RAM2 (REG_BASE + REG_OFFSET_WAVE_RAM2) -#define REG_ADDR_WAVE_RAM3 (REG_BASE + REG_OFFSET_WAVE_RAM3) -#define REG_ADDR_FIFO_A (REG_BASE + REG_OFFSET_FIFO_A) -#define REG_ADDR_FIFO_B (REG_BASE + REG_OFFSET_FIFO_B) - -#define REG_ADDR_DMA0 (REG_BASE + REG_OFFSET_DMA0) -#define REG_ADDR_DMA0SAD (REG_BASE + REG_OFFSET_DMA0SAD) -#define REG_ADDR_DMA0DAD (REG_BASE + REG_OFFSET_DMA0DAD) -#define REG_ADDR_DMA0CNT (REG_BASE + REG_OFFSET_DMA0CNT) -#define REG_ADDR_DMA0CNT_L (REG_BASE + REG_OFFSET_DMA0CNT_L) -#define REG_ADDR_DMA0CNT_H (REG_BASE + REG_OFFSET_DMA0CNT_H) -#define REG_ADDR_DMA1 (REG_BASE + REG_OFFSET_DMA1) -#define REG_ADDR_DMA1SAD (REG_BASE + REG_OFFSET_DMA1SAD) -#define REG_ADDR_DMA1DAD (REG_BASE + REG_OFFSET_DMA1DAD) -#define REG_ADDR_DMA1CNT (REG_BASE + REG_OFFSET_DMA1CNT) -#define REG_ADDR_DMA1CNT_L (REG_BASE + REG_OFFSET_DMA1CNT_L) -#define REG_ADDR_DMA1CNT_H (REG_BASE + REG_OFFSET_DMA1CNT_H) -#define REG_ADDR_DMA2 (REG_BASE + REG_OFFSET_DMA2) -#define REG_ADDR_DMA2SAD (REG_BASE + REG_OFFSET_DMA2SAD) -#define REG_ADDR_DMA2DAD (REG_BASE + REG_OFFSET_DMA2DAD) -#define REG_ADDR_DMA2CNT (REG_BASE + REG_OFFSET_DMA2CNT) -#define REG_ADDR_DMA2CNT_L (REG_BASE + REG_OFFSET_DMA2CNT_L) -#define REG_ADDR_DMA2CNT_H (REG_BASE + REG_OFFSET_DMA2CNT_H) -#define REG_ADDR_DMA3 (REG_BASE + REG_OFFSET_DMA3) -#define REG_ADDR_DMA3SAD (REG_BASE + REG_OFFSET_DMA3SAD) -#define REG_ADDR_DMA3DAD (REG_BASE + REG_OFFSET_DMA3DAD) -#define REG_ADDR_DMA3CNT (REG_BASE + REG_OFFSET_DMA3CNT) -#define REG_ADDR_DMA3CNT_L (REG_BASE + REG_OFFSET_DMA3CNT_L) -#define REG_ADDR_DMA3CNT_H (REG_BASE + REG_OFFSET_DMA3CNT_H) - -#define REG_ADDR_TMCNT (REG_BASE + REG_OFFSET_TMCNT) -#define REG_ADDR_TMCNT_L (REG_BASE + REG_OFFSET_TMCNT_L) -#define REG_ADDR_TMCNT_H (REG_BASE + REG_OFFSET_TMCNT_H) -#define REG_ADDR_TM0CNT (REG_BASE + REG_OFFSET_TM0CNT) -#define REG_ADDR_TM0CNT_L (REG_BASE + REG_OFFSET_TM0CNT_L) -#define REG_ADDR_TM0CNT_H (REG_BASE + REG_OFFSET_TM0CNT_H) -#define REG_ADDR_TM1CNT (REG_BASE + REG_OFFSET_TM1CNT) -#define REG_ADDR_TM1CNT_L (REG_BASE + REG_OFFSET_TM1CNT_L) -#define REG_ADDR_TM1CNT_H (REG_BASE + REG_OFFSET_TM1CNT_H) -#define REG_ADDR_TM2CNT (REG_BASE + REG_OFFSET_TM2CNT) -#define REG_ADDR_TM2CNT_L (REG_BASE + REG_OFFSET_TM2CNT_L) -#define REG_ADDR_TM2CNT_H (REG_BASE + REG_OFFSET_TM2CNT_H) -#define REG_ADDR_TM3CNT (REG_BASE + REG_OFFSET_TM3CNT) -#define REG_ADDR_TM3CNT_L (REG_BASE + REG_OFFSET_TM3CNT_L) -#define REG_ADDR_TM3CNT_H (REG_BASE + REG_OFFSET_TM3CNT_H) - -#define REG_ADDR_SIOCNT (REG_BASE + REG_OFFSET_SIOCNT) -#define REG_ADDR_SIODATA8 (REG_BASE + REG_OFFSET_SIODATA8) -#define REG_ADDR_SIODATA32 (REG_BASE + REG_OFFSET_SIODATA32) +#define REG_ADDR_WAVE_RAM0 (REG_BASE + REG_OFFSET_WAVE_RAM0) +#define REG_ADDR_WAVE_RAM1 (REG_BASE + REG_OFFSET_WAVE_RAM1) +#define REG_ADDR_WAVE_RAM2 (REG_BASE + REG_OFFSET_WAVE_RAM2) +#define REG_ADDR_WAVE_RAM3 (REG_BASE + REG_OFFSET_WAVE_RAM3) +#define REG_ADDR_FIFO_A (REG_BASE + REG_OFFSET_FIFO_A) +#define REG_ADDR_FIFO_B (REG_BASE + REG_OFFSET_FIFO_B) + +#define REG_ADDR_DMA0 (REG_BASE + REG_OFFSET_DMA0) +#define REG_ADDR_DMA0SAD (REG_BASE + REG_OFFSET_DMA0SAD) +#define REG_ADDR_DMA0DAD (REG_BASE + REG_OFFSET_DMA0DAD) +#define REG_ADDR_DMA0CNT (REG_BASE + REG_OFFSET_DMA0CNT) +#define REG_ADDR_DMA0CNT_L (REG_BASE + REG_OFFSET_DMA0CNT_L) +#define REG_ADDR_DMA0CNT_H (REG_BASE + REG_OFFSET_DMA0CNT_H) +#define REG_ADDR_DMA1 (REG_BASE + REG_OFFSET_DMA1) +#define REG_ADDR_DMA1SAD (REG_BASE + REG_OFFSET_DMA1SAD) +#define REG_ADDR_DMA1DAD (REG_BASE + REG_OFFSET_DMA1DAD) +#define REG_ADDR_DMA1CNT (REG_BASE + REG_OFFSET_DMA1CNT) +#define REG_ADDR_DMA1CNT_L (REG_BASE + REG_OFFSET_DMA1CNT_L) +#define REG_ADDR_DMA1CNT_H (REG_BASE + REG_OFFSET_DMA1CNT_H) +#define REG_ADDR_DMA2 (REG_BASE + REG_OFFSET_DMA2) +#define REG_ADDR_DMA2SAD (REG_BASE + REG_OFFSET_DMA2SAD) +#define REG_ADDR_DMA2DAD (REG_BASE + REG_OFFSET_DMA2DAD) +#define REG_ADDR_DMA2CNT (REG_BASE + REG_OFFSET_DMA2CNT) +#define REG_ADDR_DMA2CNT_L (REG_BASE + REG_OFFSET_DMA2CNT_L) +#define REG_ADDR_DMA2CNT_H (REG_BASE + REG_OFFSET_DMA2CNT_H) +#define REG_ADDR_DMA3 (REG_BASE + REG_OFFSET_DMA3) +#define REG_ADDR_DMA3SAD (REG_BASE + REG_OFFSET_DMA3SAD) +#define REG_ADDR_DMA3DAD (REG_BASE + REG_OFFSET_DMA3DAD) +#define REG_ADDR_DMA3CNT (REG_BASE + REG_OFFSET_DMA3CNT) +#define REG_ADDR_DMA3CNT_L (REG_BASE + REG_OFFSET_DMA3CNT_L) +#define REG_ADDR_DMA3CNT_H (REG_BASE + REG_OFFSET_DMA3CNT_H) + +#define REG_ADDR_TMCNT (REG_BASE + REG_OFFSET_TMCNT) +#define REG_ADDR_TMCNT_L (REG_BASE + REG_OFFSET_TMCNT_L) +#define REG_ADDR_TMCNT_H (REG_BASE + REG_OFFSET_TMCNT_H) +#define REG_ADDR_TM0CNT (REG_BASE + REG_OFFSET_TM0CNT) +#define REG_ADDR_TM0CNT_L (REG_BASE + REG_OFFSET_TM0CNT_L) +#define REG_ADDR_TM0CNT_H (REG_BASE + REG_OFFSET_TM0CNT_H) +#define REG_ADDR_TM1CNT (REG_BASE + REG_OFFSET_TM1CNT) +#define REG_ADDR_TM1CNT_L (REG_BASE + REG_OFFSET_TM1CNT_L) +#define REG_ADDR_TM1CNT_H (REG_BASE + REG_OFFSET_TM1CNT_H) +#define REG_ADDR_TM2CNT (REG_BASE + REG_OFFSET_TM2CNT) +#define REG_ADDR_TM2CNT_L (REG_BASE + REG_OFFSET_TM2CNT_L) +#define REG_ADDR_TM2CNT_H (REG_BASE + REG_OFFSET_TM2CNT_H) +#define REG_ADDR_TM3CNT (REG_BASE + REG_OFFSET_TM3CNT) +#define REG_ADDR_TM3CNT_L (REG_BASE + REG_OFFSET_TM3CNT_L) +#define REG_ADDR_TM3CNT_H (REG_BASE + REG_OFFSET_TM3CNT_H) + +#define REG_ADDR_SIOCNT (REG_BASE + REG_OFFSET_SIOCNT) +#define REG_ADDR_SIODATA8 (REG_BASE + REG_OFFSET_SIODATA8) +#define REG_ADDR_SIODATA32 (REG_BASE + REG_OFFSET_SIODATA32) #define REG_ADDR_SIOMLT_SEND (REG_BASE + REG_OFFSET_SIOMLT_SEND) #define REG_ADDR_SIOMLT_RECV (REG_BASE + REG_OFFSET_SIOMLT_RECV) -#define REG_ADDR_SIOMULTI0 (REG_BASE + REG_OFFSET_SIOMULTI0) -#define REG_ADDR_SIOMULTI1 (REG_BASE + REG_OFFSET_SIOMULTI1) -#define REG_ADDR_SIOMULTI2 (REG_BASE + REG_OFFSET_SIOMULTI2) -#define REG_ADDR_SIOMULTI3 (REG_BASE + REG_OFFSET_SIOMULTI3) - -#define REG_ADDR_KEYINPUT (REG_BASE + REG_OFFSET_KEYINPUT) -#define REG_ADDR_KEYCNT (REG_BASE + REG_OFFSET_KEYCNT) - -#define REG_ADDR_RCNT (REG_BASE + REG_OFFSET_RCNT) - -#define REG_ADDR_JOYCNT (REG_BASE + REG_OFFSET_JOYCNT) -#define REG_ADDR_JOYSTAT (REG_BASE + REG_OFFSET_JOYSTAT) -#define REG_ADDR_JOY_RECV (REG_BASE + REG_OFFSET_JOY_RECV) -#define REG_ADDR_JOY_RECV_L (REG_BASE + REG_OFFSET_JOY_RECV_L) -#define REG_ADDR_JOY_RECV_H (REG_BASE + REG_OFFSET_JOY_RECV_H) -#define REG_ADDR_JOY_TRANS (REG_BASE + REG_OFFSET_JOY_TRANS) +#define REG_ADDR_SIOMULTI0 (REG_BASE + REG_OFFSET_SIOMULTI0) +#define REG_ADDR_SIOMULTI1 (REG_BASE + REG_OFFSET_SIOMULTI1) +#define REG_ADDR_SIOMULTI2 (REG_BASE + REG_OFFSET_SIOMULTI2) +#define REG_ADDR_SIOMULTI3 (REG_BASE + REG_OFFSET_SIOMULTI3) + +#define REG_ADDR_KEYINPUT (REG_BASE + REG_OFFSET_KEYINPUT) +#define REG_ADDR_KEYCNT (REG_BASE + REG_OFFSET_KEYCNT) + +#define REG_ADDR_RCNT (REG_BASE + REG_OFFSET_RCNT) + +#define REG_ADDR_JOYCNT (REG_BASE + REG_OFFSET_JOYCNT) +#define REG_ADDR_JOYSTAT (REG_BASE + REG_OFFSET_JOYSTAT) +#define REG_ADDR_JOY_RECV (REG_BASE + REG_OFFSET_JOY_RECV) +#define REG_ADDR_JOY_RECV_L (REG_BASE + REG_OFFSET_JOY_RECV_L) +#define REG_ADDR_JOY_RECV_H (REG_BASE + REG_OFFSET_JOY_RECV_H) +#define REG_ADDR_JOY_TRANS (REG_BASE + REG_OFFSET_JOY_TRANS) #define REG_ADDR_JOY_TRANS_L (REG_BASE + REG_OFFSET_JOY_TRANS_L) #define REG_ADDR_JOY_TRANS_H (REG_BASE + REG_OFFSET_JOY_TRANS_H) -#define REG_ADDR_IME (REG_BASE + REG_OFFSET_IME) -#define REG_ADDR_IE (REG_BASE + REG_OFFSET_IE) -#define REG_ADDR_IF (REG_BASE + REG_OFFSET_IF) +#define REG_ADDR_IME (REG_BASE + REG_OFFSET_IME) +#define REG_ADDR_IE (REG_BASE + REG_OFFSET_IE) +#define REG_ADDR_IF (REG_BASE + REG_OFFSET_IF) -#define REG_ADDR_WAITCNT (REG_BASE + REG_OFFSET_WAITCNT) +#define REG_ADDR_WAITCNT (REG_BASE + REG_OFFSET_WAITCNT) // I/O registers -#define REG_DISPCNT (*(vu16 *)REG_ADDR_DISPCNT) -#define REG_DISPSTAT (*(vu16 *)REG_ADDR_DISPSTAT) -#define REG_VCOUNT (*(vu16 *)REG_ADDR_VCOUNT) -#define REG_BG0CNT (*(vu16 *)REG_ADDR_BG0CNT) -#define REG_BG1CNT (*(vu16 *)REG_ADDR_BG1CNT) -#define REG_BG2CNT (*(vu16 *)REG_ADDR_BG2CNT) -#define REG_BG3CNT (*(vu16 *)REG_ADDR_BG3CNT) -#define REG_BG0HOFS (*(vu16 *)REG_ADDR_BG0HOFS) -#define REG_BG0VOFS (*(vu16 *)REG_ADDR_BG0VOFS) -#define REG_BG1HOFS (*(vu16 *)REG_ADDR_BG1HOFS) -#define REG_BG1VOFS (*(vu16 *)REG_ADDR_BG1VOFS) -#define REG_BG2HOFS (*(vu16 *)REG_ADDR_BG2HOFS) -#define REG_BG2VOFS (*(vu16 *)REG_ADDR_BG2VOFS) -#define REG_BG3HOFS (*(vu16 *)REG_ADDR_BG3HOFS) -#define REG_BG3VOFS (*(vu16 *)REG_ADDR_BG3VOFS) -#define REG_BG2PA (*(vu16 *)REG_ADDR_BG2PA) -#define REG_BG2PB (*(vu16 *)REG_ADDR_BG2PB) -#define REG_BG2PC (*(vu16 *)REG_ADDR_BG2PC) -#define REG_BG2PD (*(vu16 *)REG_ADDR_BG2PD) -#define REG_BG2X (*(vu32 *)REG_ADDR_BG2X) -#define REG_BG2X_L (*(vu16 *)REG_ADDR_BG2X_L) -#define REG_BG2X_H (*(vu16 *)REG_ADDR_BG2X_H) -#define REG_BG2Y (*(vu32 *)REG_ADDR_BG2Y) -#define REG_BG2Y_L (*(vu16 *)REG_ADDR_BG2Y_L) -#define REG_BG2Y_H (*(vu16 *)REG_ADDR_BG2Y_H) -#define REG_BG3PA (*(vu16 *)REG_ADDR_BG3PA) -#define REG_BG3PB (*(vu16 *)REG_ADDR_BG3PB) -#define REG_BG3PC (*(vu16 *)REG_ADDR_BG3PC) -#define REG_BG3PD (*(vu16 *)REG_ADDR_BG3PD) -#define REG_BG3X (*(vu32 *)REG_ADDR_BG3X) -#define REG_BG3X_L (*(vu16 *)REG_ADDR_BG3X_L) -#define REG_BG3X_H (*(vu16 *)REG_ADDR_BG3X_H) -#define REG_BG3Y (*(vu32 *)REG_ADDR_BG3Y) -#define REG_BG3Y_L (*(vu16 *)REG_ADDR_BG3Y_L) -#define REG_BG3Y_H (*(vu16 *)REG_ADDR_BG3Y_H) -#define REG_WIN0H (*(vu16 *)REG_ADDR_WIN0H) -#define REG_WIN1H (*(vu16 *)REG_ADDR_WIN1H) -#define REG_WIN0V (*(vu16 *)REG_ADDR_WIN0V) -#define REG_WIN1V (*(vu16 *)REG_ADDR_WIN1V) -#define REG_WININ (*(vu16 *)REG_ADDR_WININ) -#define REG_WINOUT (*(vu16 *)REG_ADDR_WINOUT) -#define REG_MOSAIC (*(vu16 *)REG_ADDR_MOSAIC) -#define REG_BLDCNT (*(vu16 *)REG_ADDR_BLDCNT) -#define REG_BLDALPHA (*(vu16 *)REG_ADDR_BLDALPHA) -#define REG_BLDY (*(vu16 *)REG_ADDR_BLDY) - -#define REG_SOUND1CNT_L (*(vu16 *)REG_ADDR_SOUND1CNT_L) -#define REG_NR10 (*(vu8 *)REG_ADDR_NR10) -#define REG_SOUND1CNT_H (*(vu16 *)REG_ADDR_SOUND1CNT_H) -#define REG_NR11 (*(vu8 *)REG_ADDR_NR11) -#define REG_NR12 (*(vu8 *)REG_ADDR_NR12) -#define REG_SOUND1CNT_X (*(vu16 *)REG_ADDR_SOUND1CNT_X) -#define REG_NR13 (*(vu8 *)REG_ADDR_NR13) -#define REG_NR14 (*(vu8 *)REG_ADDR_NR14) -#define REG_SOUND2CNT_L (*(vu16 *)REG_ADDR_SOUND2CNT_L) -#define REG_NR21 (*(vu8 *)REG_ADDR_NR21) -#define REG_NR22 (*(vu8 *)REG_ADDR_NR22) -#define REG_SOUND2CNT_H (*(vu16 *)REG_ADDR_SOUND2CNT_H) -#define REG_NR23 (*(vu8 *)REG_ADDR_NR23) -#define REG_NR24 (*(vu8 *)REG_ADDR_NR24) -#define REG_SOUND3CNT_L (*(vu16 *)REG_ADDR_SOUND3CNT_L) -#define REG_NR30 (*(vu8 *)REG_ADDR_NR30) -#define REG_SOUND3CNT_H (*(vu16 *)REG_ADDR_SOUND3CNT_H) -#define REG_NR31 (*(vu8 *)REG_ADDR_NR31) -#define REG_NR32 (*(vu8 *)REG_ADDR_NR32) -#define REG_SOUND3CNT_X (*(vu16 *)REG_ADDR_SOUND3CNT_X) -#define REG_NR33 (*(vu8 *)REG_ADDR_NR33) -#define REG_NR34 (*(vu8 *)REG_ADDR_NR34) -#define REG_SOUND4CNT_L (*(vu16 *)REG_ADDR_SOUND4CNT_L) -#define REG_NR41 (*(vu8 *)REG_ADDR_NR41) -#define REG_NR42 (*(vu8 *)REG_ADDR_NR42) -#define REG_SOUND4CNT_H (*(vu16 *)REG_ADDR_SOUND4CNT_H) -#define REG_NR43 (*(vu8 *)REG_ADDR_NR43) -#define REG_NR44 (*(vu8 *)REG_ADDR_NR44) -#define REG_SOUNDCNT_L (*(vu16 *)REG_ADDR_SOUNDCNT_L) -#define REG_NR50 (*(vu8 *)REG_ADDR_NR50) -#define REG_NR51 (*(vu8 *)REG_ADDR_NR51) -#define REG_SOUNDCNT_H (*(vu16 *)REG_ADDR_SOUNDCNT_H) -#define REG_SOUNDCNT_X (*(vu16 *)REG_ADDR_SOUNDCNT_X) -#define REG_NR52 (*(vu8 *)REG_ADDR_NR52) -#define REG_SOUNDBIAS (*(vu16 *)REG_ADDR_SOUNDBIAS) -#define REG_SOUNDBIAS_L (*(vu8 *)REG_ADDR_SOUNDBIAS_L) -#define REG_SOUNDBIAS_H (*(vu8 *)REG_ADDR_SOUNDBIAS_H) -#define REG_WAVE_RAM0 (*(vu32 *)REG_ADDR_WAVE_RAM0) -#define REG_WAVE_RAM1 (*(vu32 *)REG_ADDR_WAVE_RAM1) -#define REG_WAVE_RAM2 (*(vu32 *)REG_ADDR_WAVE_RAM2) -#define REG_WAVE_RAM3 (*(vu32 *)REG_ADDR_WAVE_RAM3) -#define REG_FIFO_A (*(vu32 *)REG_ADDR_FIFO_A) -#define REG_FIFO_B (*(vu32 *)REG_ADDR_FIFO_B) - -#define REG_DMA0SAD (*(vu32 *)REG_ADDR_DMA0SAD) -#define REG_DMA0DAD (*(vu32 *)REG_ADDR_DMA0DAD) -#define REG_DMA0CNT (*(vu32 *)REG_ADDR_DMA0CNT) -#define REG_DMA0CNT_L (*(vu16 *)REG_ADDR_DMA0CNT_L) -#define REG_DMA0CNT_H (*(vu16 *)REG_ADDR_DMA0CNT_H) - -#define REG_DMA1SAD (*(vu32 *)REG_ADDR_DMA1SAD) -#define REG_DMA1DAD (*(vu32 *)REG_ADDR_DMA1DAD) -#define REG_DMA1CNT (*(vu32 *)REG_ADDR_DMA1CNT) -#define REG_DMA1CNT_L (*(vu16 *)REG_ADDR_DMA1CNT_L) -#define REG_DMA1CNT_H (*(vu16 *)REG_ADDR_DMA1CNT_H) - -#define REG_DMA2SAD (*(vu32 *)REG_ADDR_DMA2SAD) -#define REG_DMA2DAD (*(vu32 *)REG_ADDR_DMA2DAD) -#define REG_DMA2CNT (*(vu32 *)REG_ADDR_DMA2CNT) -#define REG_DMA2CNT_L (*(vu16 *)REG_ADDR_DMA2CNT_L) -#define REG_DMA2CNT_H (*(vu16 *)REG_ADDR_DMA2CNT_H) - -#define REG_DMA3SAD (*(vu32 *)REG_ADDR_DMA3SAD) -#define REG_DMA3DAD (*(vu32 *)REG_ADDR_DMA3DAD) -#define REG_DMA3CNT (*(vu32 *)REG_ADDR_DMA3CNT) -#define REG_DMA3CNT_L (*(vu16 *)REG_ADDR_DMA3CNT_L) -#define REG_DMA3CNT_H (*(vu16 *)REG_ADDR_DMA3CNT_H) - -#define REG_TMCNT(n) (*(vu32 *)(REG_ADDR_TMCNT + ((n) * 4))) -#define REG_TMCNT_L(n) (*(vu16 *)(REG_ADDR_TMCNT_L + ((n) * 4))) -#define REG_TMCNT_H(n) (*(vu16 *)(REG_ADDR_TMCNT_H + ((n) * 4))) -#define REG_TM0CNT (*(vu32 *)REG_ADDR_TM0CNT) -#define REG_TM0CNT_L (*(vu16 *)REG_ADDR_TM0CNT_L) -#define REG_TM0CNT_H (*(vu16 *)REG_ADDR_TM0CNT_H) -#define REG_TM1CNT (*(vu32 *)REG_ADDR_TM1CNT) -#define REG_TM1CNT_L (*(vu16 *)REG_ADDR_TM1CNT_L) -#define REG_TM1CNT_H (*(vu16 *)REG_ADDR_TM1CNT_H) -#define REG_TM2CNT (*(vu32 *)REG_ADDR_TM2CNT) -#define REG_TM2CNT_L (*(vu16 *)REG_ADDR_TM2CNT_L) -#define REG_TM2CNT_H (*(vu16 *)REG_ADDR_TM2CNT_H) -#define REG_TM3CNT (*(vu32 *)REG_ADDR_TM3CNT) -#define REG_TM3CNT_L (*(vu16 *)REG_ADDR_TM3CNT_L) -#define REG_TM3CNT_H (*(vu16 *)REG_ADDR_TM3CNT_H) - -#define REG_SIOCNT (*(vu16 *)REG_ADDR_SIOCNT) -#define REG_SIODATA8 (*(vu16 *)REG_ADDR_SIODATA8) -#define REG_SIODATA32 (*(vu32 *)REG_ADDR_SIODATA32) -#define REG_SIOMLT_SEND (*(vu16 *)REG_ADDR_SIOMLT_SEND) -#define REG_SIOMLT_RECV (*(vu64 *)REG_ADDR_SIOMLT_RECV) -#define REG_SIOMULTI0 (*(vu16 *)REG_ADDR_SIOMULTI0) -#define REG_SIOMULTI1 (*(vu16 *)REG_ADDR_SIOMULTI1) -#define REG_SIOMULTI2 (*(vu16 *)REG_ADDR_SIOMULTI2) -#define REG_SIOMULTI3 (*(vu16 *)REG_ADDR_SIOMULTI3) - -#define REG_KEYINPUT (*(vu16 *)REG_ADDR_KEYINPUT) -#define REG_KEYCNT (*(vu16 *)REG_ADDR_KEYCNT) - -#define REG_RCNT (*(vu16 *)REG_ADDR_RCNT) - -#define REG_IME (*(vu16 *)REG_ADDR_IME) -#define REG_IE (*(vu16 *)REG_ADDR_IE) -#define REG_IF (*(vu16 *)REG_ADDR_IF) - -#define REG_WAITCNT (*(vu16 *)REG_ADDR_WAITCNT) +#define REG_DISPCNT (*(vu16*)REG_ADDR_DISPCNT) +#define REG_DISPSTAT (*(vu16*)REG_ADDR_DISPSTAT) +#define REG_VCOUNT (*(vu16*)REG_ADDR_VCOUNT) +#define REG_BG0CNT (*(vu16*)REG_ADDR_BG0CNT) +#define REG_BG1CNT (*(vu16*)REG_ADDR_BG1CNT) +#define REG_BG2CNT (*(vu16*)REG_ADDR_BG2CNT) +#define REG_BG3CNT (*(vu16*)REG_ADDR_BG3CNT) +#define REG_BG0HOFS (*(vu16*)REG_ADDR_BG0HOFS) +#define REG_BG0VOFS (*(vu16*)REG_ADDR_BG0VOFS) +#define REG_BG1HOFS (*(vu16*)REG_ADDR_BG1HOFS) +#define REG_BG1VOFS (*(vu16*)REG_ADDR_BG1VOFS) +#define REG_BG2HOFS (*(vu16*)REG_ADDR_BG2HOFS) +#define REG_BG2VOFS (*(vu16*)REG_ADDR_BG2VOFS) +#define REG_BG3HOFS (*(vu16*)REG_ADDR_BG3HOFS) +#define REG_BG3VOFS (*(vu16*)REG_ADDR_BG3VOFS) +#define REG_BG2PA (*(vu16*)REG_ADDR_BG2PA) +#define REG_BG2PB (*(vu16*)REG_ADDR_BG2PB) +#define REG_BG2PC (*(vu16*)REG_ADDR_BG2PC) +#define REG_BG2PD (*(vu16*)REG_ADDR_BG2PD) +#define REG_BG2X (*(vu32*)REG_ADDR_BG2X) +#define REG_BG2X_L (*(vu16*)REG_ADDR_BG2X_L) +#define REG_BG2X_H (*(vu16*)REG_ADDR_BG2X_H) +#define REG_BG2Y (*(vu32*)REG_ADDR_BG2Y) +#define REG_BG2Y_L (*(vu16*)REG_ADDR_BG2Y_L) +#define REG_BG2Y_H (*(vu16*)REG_ADDR_BG2Y_H) +#define REG_BG3PA (*(vu16*)REG_ADDR_BG3PA) +#define REG_BG3PB (*(vu16*)REG_ADDR_BG3PB) +#define REG_BG3PC (*(vu16*)REG_ADDR_BG3PC) +#define REG_BG3PD (*(vu16*)REG_ADDR_BG3PD) +#define REG_BG3X (*(vu32*)REG_ADDR_BG3X) +#define REG_BG3X_L (*(vu16*)REG_ADDR_BG3X_L) +#define REG_BG3X_H (*(vu16*)REG_ADDR_BG3X_H) +#define REG_BG3Y (*(vu32*)REG_ADDR_BG3Y) +#define REG_BG3Y_L (*(vu16*)REG_ADDR_BG3Y_L) +#define REG_BG3Y_H (*(vu16*)REG_ADDR_BG3Y_H) +#define REG_WIN0H (*(vu16*)REG_ADDR_WIN0H) +#define REG_WIN1H (*(vu16*)REG_ADDR_WIN1H) +#define REG_WIN0V (*(vu16*)REG_ADDR_WIN0V) +#define REG_WIN1V (*(vu16*)REG_ADDR_WIN1V) +#define REG_WININ (*(vu16*)REG_ADDR_WININ) +#define REG_WINOUT (*(vu16*)REG_ADDR_WINOUT) +#define REG_MOSAIC (*(vu16*)REG_ADDR_MOSAIC) +#define REG_BLDCNT (*(vu16*)REG_ADDR_BLDCNT) +#define REG_BLDALPHA (*(vu16*)REG_ADDR_BLDALPHA) +#define REG_BLDY (*(vu16*)REG_ADDR_BLDY) + +#define REG_SOUND1CNT_L (*(vu16*)REG_ADDR_SOUND1CNT_L) +#define REG_NR10 (*(vu8*)REG_ADDR_NR10) +#define REG_SOUND1CNT_H (*(vu16*)REG_ADDR_SOUND1CNT_H) +#define REG_NR11 (*(vu8*)REG_ADDR_NR11) +#define REG_NR12 (*(vu8*)REG_ADDR_NR12) +#define REG_SOUND1CNT_X (*(vu16*)REG_ADDR_SOUND1CNT_X) +#define REG_NR13 (*(vu8*)REG_ADDR_NR13) +#define REG_NR14 (*(vu8*)REG_ADDR_NR14) +#define REG_SOUND2CNT_L (*(vu16*)REG_ADDR_SOUND2CNT_L) +#define REG_NR21 (*(vu8*)REG_ADDR_NR21) +#define REG_NR22 (*(vu8*)REG_ADDR_NR22) +#define REG_SOUND2CNT_H (*(vu16*)REG_ADDR_SOUND2CNT_H) +#define REG_NR23 (*(vu8*)REG_ADDR_NR23) +#define REG_NR24 (*(vu8*)REG_ADDR_NR24) +#define REG_SOUND3CNT_L (*(vu16*)REG_ADDR_SOUND3CNT_L) +#define REG_NR30 (*(vu8*)REG_ADDR_NR30) +#define REG_SOUND3CNT_H (*(vu16*)REG_ADDR_SOUND3CNT_H) +#define REG_NR31 (*(vu8*)REG_ADDR_NR31) +#define REG_NR32 (*(vu8*)REG_ADDR_NR32) +#define REG_SOUND3CNT_X (*(vu16*)REG_ADDR_SOUND3CNT_X) +#define REG_NR33 (*(vu8*)REG_ADDR_NR33) +#define REG_NR34 (*(vu8*)REG_ADDR_NR34) +#define REG_SOUND4CNT_L (*(vu16*)REG_ADDR_SOUND4CNT_L) +#define REG_NR41 (*(vu8*)REG_ADDR_NR41) +#define REG_NR42 (*(vu8*)REG_ADDR_NR42) +#define REG_SOUND4CNT_H (*(vu16*)REG_ADDR_SOUND4CNT_H) +#define REG_NR43 (*(vu8*)REG_ADDR_NR43) +#define REG_NR44 (*(vu8*)REG_ADDR_NR44) +#define REG_SOUNDCNT_L (*(vu16*)REG_ADDR_SOUNDCNT_L) +#define REG_NR50 (*(vu8*)REG_ADDR_NR50) +#define REG_NR51 (*(vu8*)REG_ADDR_NR51) +#define REG_SOUNDCNT_H (*(vu16*)REG_ADDR_SOUNDCNT_H) +#define REG_SOUNDCNT_X (*(vu16*)REG_ADDR_SOUNDCNT_X) +#define REG_NR52 (*(vu8*)REG_ADDR_NR52) +#define REG_SOUNDBIAS (*(vu16*)REG_ADDR_SOUNDBIAS) +#define REG_SOUNDBIAS_L (*(vu8*)REG_ADDR_SOUNDBIAS_L) +#define REG_SOUNDBIAS_H (*(vu8*)REG_ADDR_SOUNDBIAS_H) +#define REG_WAVE_RAM0 (*(vu32*)REG_ADDR_WAVE_RAM0) +#define REG_WAVE_RAM1 (*(vu32*)REG_ADDR_WAVE_RAM1) +#define REG_WAVE_RAM2 (*(vu32*)REG_ADDR_WAVE_RAM2) +#define REG_WAVE_RAM3 (*(vu32*)REG_ADDR_WAVE_RAM3) +#define REG_FIFO_A (*(vu32*)REG_ADDR_FIFO_A) +#define REG_FIFO_B (*(vu32*)REG_ADDR_FIFO_B) + +#define REG_DMA0SAD (*(vu32*)REG_ADDR_DMA0SAD) +#define REG_DMA0DAD (*(vu32*)REG_ADDR_DMA0DAD) +#define REG_DMA0CNT (*(vu32*)REG_ADDR_DMA0CNT) +#define REG_DMA0CNT_L (*(vu16*)REG_ADDR_DMA0CNT_L) +#define REG_DMA0CNT_H (*(vu16*)REG_ADDR_DMA0CNT_H) + +#define REG_DMA1SAD (*(vu32*)REG_ADDR_DMA1SAD) +#define REG_DMA1DAD (*(vu32*)REG_ADDR_DMA1DAD) +#define REG_DMA1CNT (*(vu32*)REG_ADDR_DMA1CNT) +#define REG_DMA1CNT_L (*(vu16*)REG_ADDR_DMA1CNT_L) +#define REG_DMA1CNT_H (*(vu16*)REG_ADDR_DMA1CNT_H) + +#define REG_DMA2SAD (*(vu32*)REG_ADDR_DMA2SAD) +#define REG_DMA2DAD (*(vu32*)REG_ADDR_DMA2DAD) +#define REG_DMA2CNT (*(vu32*)REG_ADDR_DMA2CNT) +#define REG_DMA2CNT_L (*(vu16*)REG_ADDR_DMA2CNT_L) +#define REG_DMA2CNT_H (*(vu16*)REG_ADDR_DMA2CNT_H) + +#define REG_DMA3SAD (*(vu32*)REG_ADDR_DMA3SAD) +#define REG_DMA3DAD (*(vu32*)REG_ADDR_DMA3DAD) +#define REG_DMA3CNT (*(vu32*)REG_ADDR_DMA3CNT) +#define REG_DMA3CNT_L (*(vu16*)REG_ADDR_DMA3CNT_L) +#define REG_DMA3CNT_H (*(vu16*)REG_ADDR_DMA3CNT_H) + +#define REG_TMCNT(n) (*(vu32*)(REG_ADDR_TMCNT + ((n)*4))) +#define REG_TMCNT_L(n) (*(vu16*)(REG_ADDR_TMCNT_L + ((n)*4))) +#define REG_TMCNT_H(n) (*(vu16*)(REG_ADDR_TMCNT_H + ((n)*4))) +#define REG_TM0CNT (*(vu32*)REG_ADDR_TM0CNT) +#define REG_TM0CNT_L (*(vu16*)REG_ADDR_TM0CNT_L) +#define REG_TM0CNT_H (*(vu16*)REG_ADDR_TM0CNT_H) +#define REG_TM1CNT (*(vu32*)REG_ADDR_TM1CNT) +#define REG_TM1CNT_L (*(vu16*)REG_ADDR_TM1CNT_L) +#define REG_TM1CNT_H (*(vu16*)REG_ADDR_TM1CNT_H) +#define REG_TM2CNT (*(vu32*)REG_ADDR_TM2CNT) +#define REG_TM2CNT_L (*(vu16*)REG_ADDR_TM2CNT_L) +#define REG_TM2CNT_H (*(vu16*)REG_ADDR_TM2CNT_H) +#define REG_TM3CNT (*(vu32*)REG_ADDR_TM3CNT) +#define REG_TM3CNT_L (*(vu16*)REG_ADDR_TM3CNT_L) +#define REG_TM3CNT_H (*(vu16*)REG_ADDR_TM3CNT_H) + +#define REG_SIOCNT (*(vu16*)REG_ADDR_SIOCNT) +#define REG_SIODATA8 (*(vu16*)REG_ADDR_SIODATA8) +#define REG_SIODATA32 (*(vu32*)REG_ADDR_SIODATA32) +#define REG_SIOMLT_SEND (*(vu16*)REG_ADDR_SIOMLT_SEND) +#define REG_SIOMLT_RECV (*(vu64*)REG_ADDR_SIOMLT_RECV) +#define REG_SIOMULTI0 (*(vu16*)REG_ADDR_SIOMULTI0) +#define REG_SIOMULTI1 (*(vu16*)REG_ADDR_SIOMULTI1) +#define REG_SIOMULTI2 (*(vu16*)REG_ADDR_SIOMULTI2) +#define REG_SIOMULTI3 (*(vu16*)REG_ADDR_SIOMULTI3) + +#define REG_KEYINPUT (*(vu16*)REG_ADDR_KEYINPUT) +#define REG_KEYCNT (*(vu16*)REG_ADDR_KEYCNT) + +#define REG_RCNT (*(vu16*)REG_ADDR_RCNT) + +#define REG_IME (*(vu16*)REG_ADDR_IME) +#define REG_IE (*(vu16*)REG_ADDR_IE) +#define REG_IF (*(vu16*)REG_ADDR_IF) + +#define REG_WAITCNT (*(vu16*)REG_ADDR_WAITCNT) // I/O register fields // DISPCNT -#define DISPCNT_MODE_0 0x0000 // BG0: text, BG1: text, BG2: text, BG3: text -#define DISPCNT_MODE_1 0x0001 // BG0: text, BG1: text, BG2: affine, BG3: off -#define DISPCNT_MODE_2 0x0002 // BG0: off, BG1: off, BG2: affine, BG3: affine -#define DISPCNT_MODE_3 0x0003 // Bitmap mode, 240x160, BGR555 color -#define DISPCNT_MODE_4 0x0004 // Bitmap mode, 240x160, 256 color palette -#define DISPCNT_MODE_5 0x0005 // Bitmap mode, 160x128, BGR555 color -#define DISPCNT_OBJ_1D_MAP 0x0040 +#define DISPCNT_MODE_0 0x0000 // BG0: text, BG1: text, BG2: text, BG3: text +#define DISPCNT_MODE_1 0x0001 // BG0: text, BG1: text, BG2: affine, BG3: off +#define DISPCNT_MODE_2 0x0002 // BG0: off, BG1: off, BG2: affine, BG3: affine +#define DISPCNT_MODE_3 0x0003 // Bitmap mode, 240x160, BGR555 color +#define DISPCNT_MODE_4 0x0004 // Bitmap mode, 240x160, 256 color palette +#define DISPCNT_MODE_5 0x0005 // Bitmap mode, 160x128, BGR555 color +#define DISPCNT_OBJ_1D_MAP 0x0040 #define DISPCNT_FORCED_BLANK 0x0080 -#define DISPCNT_BG0_ON 0x0100 -#define DISPCNT_BG1_ON 0x0200 -#define DISPCNT_BG2_ON 0x0400 -#define DISPCNT_BG3_ON 0x0800 -#define DISPCNT_BG_ALL_ON 0x0F00 -#define DISPCNT_OBJ_ON 0x1000 -#define DISPCNT_WIN0_ON 0x2000 -#define DISPCNT_WIN1_ON 0x4000 -#define DISPCNT_OBJWIN_ON 0x8000 +#define DISPCNT_BG0_ON 0x0100 +#define DISPCNT_BG1_ON 0x0200 +#define DISPCNT_BG2_ON 0x0400 +#define DISPCNT_BG3_ON 0x0800 +#define DISPCNT_BG_ALL_ON 0x0F00 +#define DISPCNT_OBJ_ON 0x1000 +#define DISPCNT_WIN0_ON 0x2000 +#define DISPCNT_WIN1_ON 0x4000 +#define DISPCNT_OBJWIN_ON 0x8000 // DISPSTAT -#define DISPSTAT_VBLANK 0x0001 // in V-Blank -#define DISPSTAT_HBLANK 0x0002 // in H-Blank -#define DISPSTAT_VCOUNT 0x0004 // V-Count match +#define DISPSTAT_VBLANK 0x0001 // in V-Blank +#define DISPSTAT_HBLANK 0x0002 // in H-Blank +#define DISPSTAT_VCOUNT 0x0004 // V-Count match #define DISPSTAT_VBLANK_INTR 0x0008 // V-Blank interrupt enabled #define DISPSTAT_HBLANK_INTR 0x0010 // H-Blank interrupt enabled #define DISPSTAT_VCOUNT_INTR 0x0020 // V-Count interrupt enabled // BGCNT -#define BGCNT_PRIORITY(n) (n) // Values 0 - 3. Lower priority BGs will be drawn on top of higher priority BGs. -#define BGCNT_CHARBASE(n) ((n) << 2) // Values 0 - 3. Base block for tile pixel data. -#define BGCNT_MOSAIC 0x0040 -#define BGCNT_16COLOR 0x0000 // 4 bits per pixel -#define BGCNT_256COLOR 0x0080 // 8 bits per pixel +#define BGCNT_PRIORITY(n) (n) // Values 0 - 3. Lower priority BGs will be drawn on top of higher priority BGs. +#define BGCNT_CHARBASE(n) ((n) << 2) // Values 0 - 3. Base block for tile pixel data. +#define BGCNT_MOSAIC 0x0040 +#define BGCNT_16COLOR 0x0000 // 4 bits per pixel +#define BGCNT_256COLOR 0x0080 // 8 bits per pixel #define BGCNT_SCREENBASE(n) ((n) << 8) // Values 0 - 31. Base block for tile map. -#define BGCNT_WRAP 0x2000 // Only affects affine BGs. Text BGs wrap by default. -#define BGCNT_TXT256x256 0x0000 // Internal screen size size of text mode BG in pixels. -#define BGCNT_TXT512x256 0x4000 -#define BGCNT_TXT256x512 0x8000 -#define BGCNT_TXT512x512 0xC000 -#define BGCNT_AFF128x128 0x0000 // Internal screen size size of affine mode BG in pixels. -#define BGCNT_AFF256x256 0x4000 -#define BGCNT_AFF512x512 0x8000 -#define BGCNT_AFF1024x1024 0xC000 +#define BGCNT_WRAP 0x2000 // Only affects affine BGs. Text BGs wrap by default. +#define BGCNT_TXT256x256 0x0000 // Internal screen size size of text mode BG in pixels. +#define BGCNT_TXT512x256 0x4000 +#define BGCNT_TXT256x512 0x8000 +#define BGCNT_TXT512x512 0xC000 +#define BGCNT_AFF128x128 0x0000 // Internal screen size size of affine mode BG in pixels. +#define BGCNT_AFF256x256 0x4000 +#define BGCNT_AFF512x512 0x8000 +#define BGCNT_AFF1024x1024 0xC000 // WININ/OUT -#define WININ_WIN0_BG0 (1 << 0) -#define WININ_WIN0_BG1 (1 << 1) -#define WININ_WIN0_BG2 (1 << 2) -#define WININ_WIN0_BG3 (1 << 3) -#define WININ_WIN0_BG_ALL (WININ_WIN0_BG0 | WININ_WIN0_BG1 | WININ_WIN0_BG2 | WININ_WIN0_BG3) -#define WININ_WIN0_OBJ (1 << 4) -#define WININ_WIN0_CLR (1 << 5) -#define WININ_WIN1_BG0 (1 << 8) -#define WININ_WIN1_BG1 (1 << 9) -#define WININ_WIN1_BG2 (1 << 10) -#define WININ_WIN1_BG3 (1 << 11) -#define WININ_WIN1_BG_ALL (WININ_WIN1_BG0 | WININ_WIN1_BG1 | WININ_WIN1_BG2 | WININ_WIN1_BG3) -#define WININ_WIN1_OBJ (1 << 12) -#define WININ_WIN1_CLR (1 << 13) - -#define WINOUT_WIN01_BG0 (1 << 0) -#define WINOUT_WIN01_BG1 (1 << 1) -#define WINOUT_WIN01_BG2 (1 << 2) -#define WINOUT_WIN01_BG3 (1 << 3) +#define WININ_WIN0_BG0 (1 << 0) +#define WININ_WIN0_BG1 (1 << 1) +#define WININ_WIN0_BG2 (1 << 2) +#define WININ_WIN0_BG3 (1 << 3) +#define WININ_WIN0_BG_ALL (WININ_WIN0_BG0 | WININ_WIN0_BG1 | WININ_WIN0_BG2 | WININ_WIN0_BG3) +#define WININ_WIN0_OBJ (1 << 4) +#define WININ_WIN0_CLR (1 << 5) +#define WININ_WIN1_BG0 (1 << 8) +#define WININ_WIN1_BG1 (1 << 9) +#define WININ_WIN1_BG2 (1 << 10) +#define WININ_WIN1_BG3 (1 << 11) +#define WININ_WIN1_BG_ALL (WININ_WIN1_BG0 | WININ_WIN1_BG1 | WININ_WIN1_BG2 | WININ_WIN1_BG3) +#define WININ_WIN1_OBJ (1 << 12) +#define WININ_WIN1_CLR (1 << 13) + +#define WINOUT_WIN01_BG0 (1 << 0) +#define WINOUT_WIN01_BG1 (1 << 1) +#define WINOUT_WIN01_BG2 (1 << 2) +#define WINOUT_WIN01_BG3 (1 << 3) #define WINOUT_WIN01_BG_ALL (WINOUT_WIN01_BG0 | WINOUT_WIN01_BG1 | WINOUT_WIN01_BG2 | WINOUT_WIN01_BG3) -#define WINOUT_WIN01_OBJ (1 << 4) -#define WINOUT_WIN01_CLR (1 << 5) -#define WINOUT_WINOBJ_BG0 (1 << 8) -#define WINOUT_WINOBJ_BG1 (1 << 9) -#define WINOUT_WINOBJ_BG2 (1 << 10) -#define WINOUT_WINOBJ_BG3 (1 << 11) +#define WINOUT_WIN01_OBJ (1 << 4) +#define WINOUT_WIN01_CLR (1 << 5) +#define WINOUT_WINOBJ_BG0 (1 << 8) +#define WINOUT_WINOBJ_BG1 (1 << 9) +#define WINOUT_WINOBJ_BG2 (1 << 10) +#define WINOUT_WINOBJ_BG3 (1 << 11) #define WINOUT_WINOBJ_BG_ALL (WINOUT_WINOBJ_BG0 | WINOUT_WINOBJ_BG1 | WINOUT_WINOBJ_BG2 | WINOUT_WINOBJ_BG3) -#define WINOUT_WINOBJ_OBJ (1 << 12) -#define WINOUT_WINOBJ_CLR (1 << 13) +#define WINOUT_WINOBJ_OBJ (1 << 12) +#define WINOUT_WINOBJ_CLR (1 << 13) #define WIN_RANGE(a, b) (((a) << 8) | (b)) #define WIN_RANGE2(a, b) ((b) | ((a) << 8)) // BLDCNT // Bits 0-5 select layers for the 1st target -#define BLDCNT_TGT1_BG0 (1 << 0) -#define BLDCNT_TGT1_BG1 (1 << 1) -#define BLDCNT_TGT1_BG2 (1 << 2) -#define BLDCNT_TGT1_BG3 (1 << 3) -#define BLDCNT_TGT1_OBJ (1 << 4) -#define BLDCNT_TGT1_BD (1 << 5) +#define BLDCNT_TGT1_BG0 (1 << 0) +#define BLDCNT_TGT1_BG1 (1 << 1) +#define BLDCNT_TGT1_BG2 (1 << 2) +#define BLDCNT_TGT1_BG3 (1 << 3) +#define BLDCNT_TGT1_OBJ (1 << 4) +#define BLDCNT_TGT1_BD (1 << 5) // Bits 6-7 select the special effect -#define BLDCNT_EFFECT_NONE (0 << 6) // no special effect -#define BLDCNT_EFFECT_BLEND (1 << 6) // 1st+2nd targets mixed (controlled by BLDALPHA) -#define BLDCNT_EFFECT_LIGHTEN (2 << 6) // 1st target becomes whiter (controlled by BLDY) -#define BLDCNT_EFFECT_DARKEN (3 << 6) // 1st target becomes blacker (controlled by BLDY) +#define BLDCNT_EFFECT_NONE (0 << 6) // no special effect +#define BLDCNT_EFFECT_BLEND (1 << 6) // 1st+2nd targets mixed (controlled by BLDALPHA) +#define BLDCNT_EFFECT_LIGHTEN (2 << 6) // 1st target becomes whiter (controlled by BLDY) +#define BLDCNT_EFFECT_DARKEN (3 << 6) // 1st target becomes blacker (controlled by BLDY) // Bits 8-13 select layers for the 2nd target -#define BLDCNT_TGT2_BG0 (1 << 8) -#define BLDCNT_TGT2_BG1 (1 << 9) -#define BLDCNT_TGT2_BG2 (1 << 10) -#define BLDCNT_TGT2_BG3 (1 << 11) -#define BLDCNT_TGT2_OBJ (1 << 12) -#define BLDCNT_TGT2_BD (1 << 13) -#define BLDCNT_TGT2_ALL (BLDCNT_TGT2_BG0 | BLDCNT_TGT2_BG1 | BLDCNT_TGT2_BG2 | BLDCNT_TGT2_BG3 | BLDCNT_TGT2_OBJ | BLDCNT_TGT2_BD) +#define BLDCNT_TGT2_BG0 (1 << 8) +#define BLDCNT_TGT2_BG1 (1 << 9) +#define BLDCNT_TGT2_BG2 (1 << 10) +#define BLDCNT_TGT2_BG3 (1 << 11) +#define BLDCNT_TGT2_OBJ (1 << 12) +#define BLDCNT_TGT2_BD (1 << 13) +#define BLDCNT_TGT2_ALL \ + (BLDCNT_TGT2_BG0 | BLDCNT_TGT2_BG1 | BLDCNT_TGT2_BG2 | BLDCNT_TGT2_BG3 | BLDCNT_TGT2_OBJ | BLDCNT_TGT2_BD) // BLDALPHA #define BLDALPHA_BLEND(target1, target2) (((target2) << 8) | (target1)) @@ -606,180 +607,180 @@ // SOUNDCNT_H #define SOUND_CGB_MIX_QUARTER 0x0000 -#define SOUND_CGB_MIX_HALF 0x0001 -#define SOUND_CGB_MIX_FULL 0x0002 -#define SOUND_A_MIX_HALF 0x0000 -#define SOUND_A_MIX_FULL 0x0004 -#define SOUND_B_MIX_HALF 0x0000 -#define SOUND_B_MIX_FULL 0x0008 -#define SOUND_ALL_MIX_FULL 0x000E -#define SOUND_A_RIGHT_OUTPUT 0x0100 -#define SOUND_A_LEFT_OUTPUT 0x0200 -#define SOUND_A_TIMER_0 0x0000 -#define SOUND_A_TIMER_1 0x0400 -#define SOUND_A_FIFO_RESET 0x0800 -#define SOUND_B_RIGHT_OUTPUT 0x1000 -#define SOUND_B_LEFT_OUTPUT 0x2000 -#define SOUND_B_TIMER_0 0x0000 -#define SOUND_B_TIMER_1 0x4000 -#define SOUND_B_FIFO_RESET 0x8000 +#define SOUND_CGB_MIX_HALF 0x0001 +#define SOUND_CGB_MIX_FULL 0x0002 +#define SOUND_A_MIX_HALF 0x0000 +#define SOUND_A_MIX_FULL 0x0004 +#define SOUND_B_MIX_HALF 0x0000 +#define SOUND_B_MIX_FULL 0x0008 +#define SOUND_ALL_MIX_FULL 0x000E +#define SOUND_A_RIGHT_OUTPUT 0x0100 +#define SOUND_A_LEFT_OUTPUT 0x0200 +#define SOUND_A_TIMER_0 0x0000 +#define SOUND_A_TIMER_1 0x0400 +#define SOUND_A_FIFO_RESET 0x0800 +#define SOUND_B_RIGHT_OUTPUT 0x1000 +#define SOUND_B_LEFT_OUTPUT 0x2000 +#define SOUND_B_TIMER_0 0x0000 +#define SOUND_B_TIMER_1 0x4000 +#define SOUND_B_FIFO_RESET 0x8000 // SOUNDCNT_X -#define SOUND_1_ON 0x0001 -#define SOUND_2_ON 0x0002 -#define SOUND_3_ON 0x0004 -#define SOUND_4_ON 0x0008 +#define SOUND_1_ON 0x0001 +#define SOUND_2_ON 0x0002 +#define SOUND_3_ON 0x0004 +#define SOUND_4_ON 0x0008 #define SOUND_MASTER_ENABLE 0x0080 // DMA -#define DMA_DEST_INC 0x0000 -#define DMA_DEST_DEC 0x0020 -#define DMA_DEST_FIXED 0x0040 -#define DMA_DEST_RELOAD 0x0060 -#define DMA_SRC_INC 0x0000 -#define DMA_SRC_DEC 0x0080 -#define DMA_SRC_FIXED 0x0100 -#define DMA_REPEAT 0x0200 -#define DMA_16BIT 0x0000 -#define DMA_32BIT 0x0400 -#define DMA_DREQ_ON 0x0800 -#define DMA_START_NOW 0x0000 -#define DMA_START_VBLANK 0x1000 -#define DMA_START_HBLANK 0x2000 +#define DMA_DEST_INC 0x0000 +#define DMA_DEST_DEC 0x0020 +#define DMA_DEST_FIXED 0x0040 +#define DMA_DEST_RELOAD 0x0060 +#define DMA_SRC_INC 0x0000 +#define DMA_SRC_DEC 0x0080 +#define DMA_SRC_FIXED 0x0100 +#define DMA_REPEAT 0x0200 +#define DMA_16BIT 0x0000 +#define DMA_32BIT 0x0400 +#define DMA_DREQ_ON 0x0800 +#define DMA_START_NOW 0x0000 +#define DMA_START_VBLANK 0x1000 +#define DMA_START_HBLANK 0x2000 #define DMA_START_SPECIAL 0x3000 -#define DMA_START_MASK 0x3000 -#define DMA_INTR_ENABLE 0x4000 -#define DMA_ENABLE 0x8000 +#define DMA_START_MASK 0x3000 +#define DMA_INTR_ENABLE 0x4000 +#define DMA_ENABLE 0x8000 // timer -#define TIMER_1CLK 0x00 -#define TIMER_64CLK 0x01 -#define TIMER_256CLK 0x02 -#define TIMER_1024CLK 0x03 +#define TIMER_1CLK 0x00 +#define TIMER_64CLK 0x01 +#define TIMER_256CLK 0x02 +#define TIMER_1024CLK 0x03 #define TIMER_INTR_ENABLE 0x40 -#define TIMER_ENABLE 0x80 +#define TIMER_ENABLE 0x80 // serial -#define SIO_ID 0x0030 // Communication ID - -#define SIO_8BIT_MODE 0x0000 // Normal 8-bit communication mode -#define SIO_32BIT_MODE 0x1000 // Normal 32-bit communication mode -#define SIO_MULTI_MODE 0x2000 // Multi-player communication mode -#define SIO_UART_MODE 0x3000 // UART communication mode - -#define SIO_SCK_OUT 0x0000 // Select external clock -#define SIO_SCK_IN 0x0001 // Select internal clock -#define SIO_IN_SCK_256K 0x0000 // Select internal clock 256KHz -#define SIO_IN_SCK_2M 0x0002 // Select 2MHz -#define SIO_ACK_RECV 0x0004 // Request transfer -#define SIO_ACK_SEND 0x0008 // Enable transfer -#define SIO_9600_BPS 0x0000 // baud rate 9600 bps -#define SIO_38400_BPS 0x0001 // 38400 bps -#define SIO_57600_BPS 0x0002 // 57600 bps -#define SIO_115200_BPS 0x0003 // 115200 bps - -#define SIO_MULTI_CONNECT 0x0004 // Connecting multi-play communication -#define SIO_MULTI_DISCONNECT 0x0000 // Disconnect -#define SIO_MULTI_PARENT 0x0008 // Multi-play communication Connect master -#define SIO_MULTI_CHILD 0x0000 // Connect slave -#define SIO_MULTI_SI 0x0004 // Multi-play communication SI terminal -#define SIO_MULTI_SD 0x0008 // SD terminal -#define SIO_MULTI_BUSY 0x0080 // Multi-play communicating -#define SIO_CTS_ENABLE 0x0004 // Enable UART send enable signal -#define SIO_UART_7BIT 0x0000 // UART communication data length 7 bit -#define SIO_UART_8BIT 0x0080 // 8 bit - -#define SIO_ERROR 0x0040 // Detect error -#define SIO_START 0x0080 // Start transfer -#define SIO_ENABLE 0x0080 // Enable SIO - -#define SIO_PARITY_ENABLE 0x0200 // Enable parity -#define SIO_PARITY_EVEN 0x0000 // Even parity -#define SIO_PARITY_ODD 0x0008 // Odd parity -#define SIO_TRANS_ENABLE 0x0400 // Enable transmitter -#define SIO_TRANS_DATA_FULL 0x0010 // Transmitted data full -#define SIO_RECV_ENABLE 0x0800 // Enable receiver -#define SIO_RECV_DATA_EMPTY 0x0020 // No data received -#define SIO_INTR_ENABLE 0x4000 // Enable interrupt request +#define SIO_ID 0x0030 // Communication ID + +#define SIO_8BIT_MODE 0x0000 // Normal 8-bit communication mode +#define SIO_32BIT_MODE 0x1000 // Normal 32-bit communication mode +#define SIO_MULTI_MODE 0x2000 // Multi-player communication mode +#define SIO_UART_MODE 0x3000 // UART communication mode + +#define SIO_SCK_OUT 0x0000 // Select external clock +#define SIO_SCK_IN 0x0001 // Select internal clock +#define SIO_IN_SCK_256K 0x0000 // Select internal clock 256KHz +#define SIO_IN_SCK_2M 0x0002 // Select 2MHz +#define SIO_ACK_RECV 0x0004 // Request transfer +#define SIO_ACK_SEND 0x0008 // Enable transfer +#define SIO_9600_BPS 0x0000 // baud rate 9600 bps +#define SIO_38400_BPS 0x0001 // 38400 bps +#define SIO_57600_BPS 0x0002 // 57600 bps +#define SIO_115200_BPS 0x0003 // 115200 bps + +#define SIO_MULTI_CONNECT 0x0004 // Connecting multi-play communication +#define SIO_MULTI_DISCONNECT 0x0000 // Disconnect +#define SIO_MULTI_PARENT 0x0008 // Multi-play communication Connect master +#define SIO_MULTI_CHILD 0x0000 // Connect slave +#define SIO_MULTI_SI 0x0004 // Multi-play communication SI terminal +#define SIO_MULTI_SD 0x0008 // SD terminal +#define SIO_MULTI_BUSY 0x0080 // Multi-play communicating +#define SIO_CTS_ENABLE 0x0004 // Enable UART send enable signal +#define SIO_UART_7BIT 0x0000 // UART communication data length 7 bit +#define SIO_UART_8BIT 0x0080 // 8 bit + +#define SIO_ERROR 0x0040 // Detect error +#define SIO_START 0x0080 // Start transfer +#define SIO_ENABLE 0x0080 // Enable SIO + +#define SIO_PARITY_ENABLE 0x0200 // Enable parity +#define SIO_PARITY_EVEN 0x0000 // Even parity +#define SIO_PARITY_ODD 0x0008 // Odd parity +#define SIO_TRANS_ENABLE 0x0400 // Enable transmitter +#define SIO_TRANS_DATA_FULL 0x0010 // Transmitted data full +#define SIO_RECV_ENABLE 0x0800 // Enable receiver +#define SIO_RECV_DATA_EMPTY 0x0020 // No data received +#define SIO_INTR_ENABLE 0x4000 // Enable interrupt request #define SIO_MULTI_SI_SHIFT 2 -#define SIO_MULTI_SI_MASK 0x1 +#define SIO_MULTI_SI_MASK 0x1 #define SIO_MULTI_DI_SHIFT 3 -#define SIO_MULTI_DI_MASK 0x1 +#define SIO_MULTI_DI_MASK 0x1 // keys -#define A_BUTTON 0x0001 -#define B_BUTTON 0x0002 -#define SELECT_BUTTON 0x0004 -#define START_BUTTON 0x0008 -#define DPAD_RIGHT 0x0010 -#define DPAD_LEFT 0x0020 -#define DPAD_UP 0x0040 -#define DPAD_DOWN 0x0080 -#define R_BUTTON 0x0100 -#define L_BUTTON 0x0200 -#define KEYS_MASK 0x03FF +#define A_BUTTON 0x0001 +#define B_BUTTON 0x0002 +#define SELECT_BUTTON 0x0004 +#define START_BUTTON 0x0008 +#define DPAD_RIGHT 0x0010 +#define DPAD_LEFT 0x0020 +#define DPAD_UP 0x0040 +#define DPAD_DOWN 0x0080 +#define R_BUTTON 0x0100 +#define L_BUTTON 0x0200 +#define KEYS_MASK 0x03FF #define KEY_INTR_ENABLE 0x0400 -#define KEY_OR_INTR 0x0000 -#define KEY_AND_INTR 0x8000 -#define DPAD_ANY 0x00F0 -#define JOY_EXCL_DPAD 0x030F +#define KEY_OR_INTR 0x0000 +#define KEY_AND_INTR 0x8000 +#define DPAD_ANY 0x00F0 +#define JOY_EXCL_DPAD 0x030F // interrupt flags -#define INTR_FLAG_VBLANK (1 << 0) -#define INTR_FLAG_HBLANK (1 << 1) -#define INTR_FLAG_VCOUNT (1 << 2) -#define INTR_FLAG_TIMER0 (1 << 3) -#define INTR_FLAG_TIMER1 (1 << 4) -#define INTR_FLAG_TIMER2 (1 << 5) -#define INTR_FLAG_TIMER3 (1 << 6) -#define INTR_FLAG_SERIAL (1 << 7) -#define INTR_FLAG_DMA0 (1 << 8) -#define INTR_FLAG_DMA1 (1 << 9) -#define INTR_FLAG_DMA2 (1 << 10) -#define INTR_FLAG_DMA3 (1 << 11) -#define INTR_FLAG_KEYPAD (1 << 12) +#define INTR_FLAG_VBLANK (1 << 0) +#define INTR_FLAG_HBLANK (1 << 1) +#define INTR_FLAG_VCOUNT (1 << 2) +#define INTR_FLAG_TIMER0 (1 << 3) +#define INTR_FLAG_TIMER1 (1 << 4) +#define INTR_FLAG_TIMER2 (1 << 5) +#define INTR_FLAG_TIMER3 (1 << 6) +#define INTR_FLAG_SERIAL (1 << 7) +#define INTR_FLAG_DMA0 (1 << 8) +#define INTR_FLAG_DMA1 (1 << 9) +#define INTR_FLAG_DMA2 (1 << 10) +#define INTR_FLAG_DMA3 (1 << 11) +#define INTR_FLAG_KEYPAD (1 << 12) #define INTR_FLAG_GAMEPAK (1 << 13) // WAITCNT -#define WAITCNT_SRAM_4 (0 << 0) -#define WAITCNT_SRAM_3 (1 << 0) -#define WAITCNT_SRAM_2 (2 << 0) -#define WAITCNT_SRAM_8 (3 << 0) -#define WAITCNT_SRAM_MASK (3 << 0) - -#define WAITCNT_WS0_N_4 (0 << 2) -#define WAITCNT_WS0_N_3 (1 << 2) -#define WAITCNT_WS0_N_2 (2 << 2) -#define WAITCNT_WS0_N_8 (3 << 2) -#define WAITCNT_WS0_N_MASK (3 << 2) - -#define WAITCNT_WS0_S_2 (0 << 4) -#define WAITCNT_WS0_S_1 (1 << 4) - -#define WAITCNT_WS1_N_4 (0 << 5) -#define WAITCNT_WS1_N_3 (1 << 5) -#define WAITCNT_WS1_N_2 (2 << 5) -#define WAITCNT_WS1_N_8 (3 << 5) -#define WAITCNT_WS1_N_MASK (3 << 5) - -#define WAITCNT_WS1_S_4 (0 << 7) -#define WAITCNT_WS1_S_1 (1 << 7) - -#define WAITCNT_WS2_N_4 (0 << 8) -#define WAITCNT_WS2_N_3 (1 << 8) -#define WAITCNT_WS2_N_2 (2 << 8) -#define WAITCNT_WS2_N_8 (3 << 8) -#define WAITCNT_WS2_N_MASK (3 << 8) - -#define WAITCNT_WS2_S_8 (0 << 10) -#define WAITCNT_WS2_S_1 (1 << 10) - -#define WAITCNT_PHI_OUT_NONE (0 << 11) -#define WAITCNT_PHI_OUT_4MHZ (1 << 11) -#define WAITCNT_PHI_OUT_8MHZ (2 << 11) -#define WAITCNT_PHI_OUT_16MHZ (3 << 11) -#define WAITCNT_PHI_OUT_MASK (3 << 11) +#define WAITCNT_SRAM_4 (0 << 0) +#define WAITCNT_SRAM_3 (1 << 0) +#define WAITCNT_SRAM_2 (2 << 0) +#define WAITCNT_SRAM_8 (3 << 0) +#define WAITCNT_SRAM_MASK (3 << 0) + +#define WAITCNT_WS0_N_4 (0 << 2) +#define WAITCNT_WS0_N_3 (1 << 2) +#define WAITCNT_WS0_N_2 (2 << 2) +#define WAITCNT_WS0_N_8 (3 << 2) +#define WAITCNT_WS0_N_MASK (3 << 2) + +#define WAITCNT_WS0_S_2 (0 << 4) +#define WAITCNT_WS0_S_1 (1 << 4) + +#define WAITCNT_WS1_N_4 (0 << 5) +#define WAITCNT_WS1_N_3 (1 << 5) +#define WAITCNT_WS1_N_2 (2 << 5) +#define WAITCNT_WS1_N_8 (3 << 5) +#define WAITCNT_WS1_N_MASK (3 << 5) + +#define WAITCNT_WS1_S_4 (0 << 7) +#define WAITCNT_WS1_S_1 (1 << 7) + +#define WAITCNT_WS2_N_4 (0 << 8) +#define WAITCNT_WS2_N_3 (1 << 8) +#define WAITCNT_WS2_N_2 (2 << 8) +#define WAITCNT_WS2_N_8 (3 << 8) +#define WAITCNT_WS2_N_MASK (3 << 8) + +#define WAITCNT_WS2_S_8 (0 << 10) +#define WAITCNT_WS2_S_1 (1 << 10) + +#define WAITCNT_PHI_OUT_NONE (0 << 11) +#define WAITCNT_PHI_OUT_4MHZ (1 << 11) +#define WAITCNT_PHI_OUT_8MHZ (2 << 11) +#define WAITCNT_PHI_OUT_16MHZ (3 << 11) +#define WAITCNT_PHI_OUT_MASK (3 << 11) #define WAITCNT_PREFETCH_ENABLE (1 << 14) diff --git a/include/gba/isagbprint.h b/include/gba/isagbprint.h index af207657..ea5f2a2b 100644 --- a/include/gba/isagbprint.h +++ b/include/gba/isagbprint.h @@ -5,46 +5,46 @@ #define AGBPrintInit() #define AGBPutc(cChr) #define AGBPrint(pBuf) -#define AGBPrintf(pBuf, ...) +#define AGBPrintf(pBuf, ...) #define AGBPrintFlush1Block() #define AGBPrintFlush() #define AGBAssert(pFile, nLine, pExpression, nStopProgram) #else void AGBPrintInit(void); void AGBPutc(const char cChr); -void AGBPrint(const char *pBuf); -void AGBPrintf(const char *pBuf, ...); +void AGBPrint(const char* pBuf); +void AGBPrintf(const char* pBuf, ...); void AGBPrintFlush1Block(void); void AGBPrintFlush(void); -void AGBAssert(const char *pFile, int nLine, const char *pExpression, int nStopProgram); +void AGBAssert(const char* pFile, int nLine, const char* pExpression, int nStopProgram); #endif #undef AGB_ASSERT #ifdef NDEBUG -#define AGB_ASSERT(exp) +#define AGB_ASSERT(exp) #else -#define AGB_ASSERT(exp) (exp) ? ((void *)0) : AGBAssert(__FILE__, __LINE__, #exp, 1); +#define AGB_ASSERT(exp) (exp) ? ((void*)0) : AGBAssert(__FILE__, __LINE__, #exp, 1); #endif #undef AGB_WARNING #ifdef NDEBUG -#define AGB_WARNING(exp) +#define AGB_WARNING(exp) #else -#define AGB_WARNING(exp) (exp) ? ((void *)0) : AGBAssert(__FILE__, __LINE__, #exp, 0); +#define AGB_WARNING(exp) (exp) ? ((void*)0) : AGBAssert(__FILE__, __LINE__, #exp, 0); #endif // for matching purposes #ifdef NDEBUG -#define AGB_ASSERT_EX(exp, file, line) +#define AGB_ASSERT_EX(exp, file, line) #else -#define AGB_ASSERT_EX(exp, file, line) (exp) ? ((void *)0) : AGBAssert(file, line, #exp, 1); +#define AGB_ASSERT_EX(exp, file, line) (exp) ? ((void*)0) : AGBAssert(file, line, #exp, 1); #endif #ifdef NDEBUG -#define AGB_WARNING_EX(exp, file, line) +#define AGB_WARNING_EX(exp, file, line) #else -#define AGB_WARNING_EX(exp, file, line) (exp) ? ((void *)0) : AGBAssert(file, line, #exp, 0); +#define AGB_WARNING_EX(exp, file, line) (exp) ? ((void*)0) : AGBAssert(file, line, #exp, 0); #endif #endif // GUARD_GBA_ISAGBPRINT_H diff --git a/include/gba/m4a_internal.h b/include/gba/m4a_internal.h index d8e9bed0..05a47859 100644 --- a/include/gba/m4a_internal.h +++ b/include/gba/m4a_internal.h @@ -9,66 +9,63 @@ #define C_V 0x40 // center value for PAN, BEND, and TUNE -#define SOUND_MODE_REVERB_VAL 0x0000007F -#define SOUND_MODE_REVERB_SET 0x00000080 -#define SOUND_MODE_MAXCHN 0x00000F00 +#define SOUND_MODE_REVERB_VAL 0x0000007F +#define SOUND_MODE_REVERB_SET 0x00000080 +#define SOUND_MODE_MAXCHN 0x00000F00 #define SOUND_MODE_MAXCHN_SHIFT 8 -#define SOUND_MODE_MASVOL 0x0000F000 +#define SOUND_MODE_MASVOL 0x0000F000 #define SOUND_MODE_MASVOL_SHIFT 12 -#define SOUND_MODE_FREQ_05734 0x00010000 -#define SOUND_MODE_FREQ_07884 0x00020000 -#define SOUND_MODE_FREQ_10512 0x00030000 -#define SOUND_MODE_FREQ_13379 0x00040000 -#define SOUND_MODE_FREQ_15768 0x00050000 -#define SOUND_MODE_FREQ_18157 0x00060000 -#define SOUND_MODE_FREQ_21024 0x00070000 -#define SOUND_MODE_FREQ_26758 0x00080000 -#define SOUND_MODE_FREQ_31536 0x00090000 -#define SOUND_MODE_FREQ_36314 0x000A0000 -#define SOUND_MODE_FREQ_40137 0x000B0000 -#define SOUND_MODE_FREQ_42048 0x000C0000 -#define SOUND_MODE_FREQ 0x000F0000 -#define SOUND_MODE_FREQ_SHIFT 16 -#define SOUND_MODE_DA_BIT_9 0x00800000 -#define SOUND_MODE_DA_BIT_8 0x00900000 -#define SOUND_MODE_DA_BIT_7 0x00A00000 -#define SOUND_MODE_DA_BIT_6 0x00B00000 -#define SOUND_MODE_DA_BIT 0x00B00000 +#define SOUND_MODE_FREQ_05734 0x00010000 +#define SOUND_MODE_FREQ_07884 0x00020000 +#define SOUND_MODE_FREQ_10512 0x00030000 +#define SOUND_MODE_FREQ_13379 0x00040000 +#define SOUND_MODE_FREQ_15768 0x00050000 +#define SOUND_MODE_FREQ_18157 0x00060000 +#define SOUND_MODE_FREQ_21024 0x00070000 +#define SOUND_MODE_FREQ_26758 0x00080000 +#define SOUND_MODE_FREQ_31536 0x00090000 +#define SOUND_MODE_FREQ_36314 0x000A0000 +#define SOUND_MODE_FREQ_40137 0x000B0000 +#define SOUND_MODE_FREQ_42048 0x000C0000 +#define SOUND_MODE_FREQ 0x000F0000 +#define SOUND_MODE_FREQ_SHIFT 16 +#define SOUND_MODE_DA_BIT_9 0x00800000 +#define SOUND_MODE_DA_BIT_8 0x00900000 +#define SOUND_MODE_DA_BIT_7 0x00A00000 +#define SOUND_MODE_DA_BIT_6 0x00B00000 +#define SOUND_MODE_DA_BIT 0x00B00000 #define SOUND_MODE_DA_BIT_SHIFT 20 -struct WaveData -{ +struct WaveData { u16 type; u16 status; u32 freq; u32 loopStart; - u32 size; // number of samples + u32 size; // number of samples s8 data[1]; // samples }; -#define TONEDATA_TYPE_CGB 0x07 -#define TONEDATA_TYPE_FIX 0x08 -#define TONEDATA_TYPE_SPL 0x40 // key split -#define TONEDATA_TYPE_RHY 0x80 // rhythm +#define TONEDATA_TYPE_CGB 0x07 +#define TONEDATA_TYPE_FIX 0x08 +#define TONEDATA_TYPE_SPL 0x40 // key split +#define TONEDATA_TYPE_RHY 0x80 // rhythm -#define TONEDATA_P_S_PAN 0xc0 -#define TONEDATA_P_S_PAM TONEDATA_P_S_PAN +#define TONEDATA_P_S_PAN 0xc0 +#define TONEDATA_P_S_PAM TONEDATA_P_S_PAN -struct ToneData -{ +struct ToneData { u8 type; u8 key; - u8 length; // sound length (compatible sound) + u8 length; // sound length (compatible sound) u8 pan_sweep; // pan or sweep (compatible sound ch. 1) - struct WaveData *wav; + struct WaveData* wav; u8 attack; u8 decay; u8 sustain; u8 release; }; -struct CgbChannel -{ +struct CgbChannel { u8 sf; u8 ty; u8 rightVolume; @@ -100,7 +97,7 @@ struct CgbChannel u8 le; u8 sw; u32 fr; - u32 *wp; + u32* wp; u32 cp; u32 tp; u32 pp; @@ -110,8 +107,7 @@ struct CgbChannel struct MusicPlayerTrack; -struct SoundChannel -{ +struct SoundChannel { u8 status; u8 type; u8 rightVolume; @@ -137,9 +133,9 @@ struct SoundChannel u32 ct; u32 fw; u32 freq; - struct WaveData *wav; + struct WaveData* wav; u32 cp; - struct MusicPlayerTrack *track; + struct MusicPlayerTrack* track; u32 pp; u32 np; u32 d4; @@ -151,8 +147,7 @@ struct SoundChannel #define PCM_DMA_BUF_SIZE 1584 // size of Direct Sound buffer -struct SoundInfo -{ +struct SoundInfo { // This field is normally equal to ID_NUMBER but it is set to other // values during sensitive operations for locking purposes. // This field should be volatile but isn't. This could potentially cause @@ -175,39 +170,37 @@ struct SoundInfo s32 pcmSamplesPerVBlank; s32 pcmFreq; s32 divFreq; - struct CgbChannel *cgbChans; + struct CgbChannel* cgbChans; u32 func; u32 intp; void (*CgbSound)(void); void (*CgbOscOff)(u8); u32 (*MidiKeyToCgbFreq)(u8, u8, u8); u32 MPlayJumpTable; - void *plynote; + void* plynote; void (*ExtVolPit)(void); u8 gap2[16]; struct SoundChannel chans[MAX_DIRECTSOUND_CHANNELS]; s8 pcmBuffer[PCM_DMA_BUF_SIZE * 2]; }; -struct SongHeader -{ +struct SongHeader { u8 trackCount; u8 blockCount; u8 priority; u8 reverb; - struct ToneData *tone; - u8 *part[1]; + struct ToneData* tone; + u8* part[1]; }; #define MPT_FLG_VOLSET 0x01 #define MPT_FLG_VOLCHG 0x03 #define MPT_FLG_PITSET 0x04 #define MPT_FLG_PITCHG 0x0C -#define MPT_FLG_START 0x40 -#define MPT_FLG_EXIST 0x80 +#define MPT_FLG_START 0x40 +#define MPT_FLG_EXIST 0x80 -struct MusicPlayerTrack -{ +struct MusicPlayerTrack { u8 flags; u8 wait; u8 patternLevel; @@ -240,13 +233,13 @@ struct MusicPlayerTrack u8 priority; u8 echoVolume; u8 echoLength; - struct SoundChannel *chan; + struct SoundChannel* chan; struct ToneData tone; u8 gap[10]; u16 unk_3A; u32 unk_3C; - u8 *cmdPtr; - u8 *patternStack[3]; + u8* cmdPtr; + u8* patternStack[3]; }; #define MUSICPLAYER_STATUS_TRACK 0x0000ffff @@ -254,14 +247,13 @@ struct MusicPlayerTrack #define MAX_MUSICPLAYER_TRACKS 16 -#define TEMPORARY_FADE 0x0001 -#define FADE_IN 0x0002 -#define FADE_VOL_MAX 64 -#define FADE_VOL_SHIFT 2 +#define TEMPORARY_FADE 0x0001 +#define FADE_IN 0x0002 +#define FADE_VOL_MAX 64 +#define FADE_VOL_SHIFT 2 -struct MusicPlayerInfo -{ - struct SongHeader *songHeader; +struct MusicPlayerInfo { + struct SongHeader* songHeader; u32 status; u8 trackCount; u8 priority; @@ -269,7 +261,7 @@ struct MusicPlayerInfo u8 unk_B; u32 clock; u8 gap[8]; - u8 *memAccArea; + u8* memAccArea; u16 tempoD; u16 tempoU; u16 tempoI; @@ -277,24 +269,22 @@ struct MusicPlayerInfo u16 fadeOI; u16 fadeOC; u16 fadeOV; - struct MusicPlayerTrack *tracks; - struct ToneData *tone; + struct MusicPlayerTrack* tracks; + struct ToneData* tone; u32 ident; u32 func; u32 intp; }; -struct MusicPlayer -{ - struct MusicPlayerInfo *info; - struct MusicPlayerTrack *track; +struct MusicPlayer { + struct MusicPlayerInfo* info; + struct MusicPlayerTrack* track; u8 unk_8; u16 unk_A; }; -struct Song -{ - struct SongHeader *header; +struct Song { + struct SongHeader* header; u16 ms; u16 me; }; @@ -308,9 +298,9 @@ extern u8 gMPlayMemAccArea[]; extern char SoundMainRAM[]; -extern void *gMPlayJumpTable[]; +extern void* gMPlayJumpTable[]; -typedef void (*XcmdFunc)(struct MusicPlayerInfo *, struct MusicPlayerTrack *); +typedef void (*XcmdFunc)(struct MusicPlayerInfo*, struct MusicPlayerTrack*); extern const XcmdFunc gXcmdTable[]; extern struct CgbChannel gCgbChans[]; @@ -333,75 +323,75 @@ extern char gMaxLines[]; u32 umul3232H32(u32 multiplier, u32 multiplicand); void SoundMain(void); void SoundMainBTM(void); -void TrackStop(struct MusicPlayerInfo *mplayInfo, struct MusicPlayerTrack *track); +void TrackStop(struct MusicPlayerInfo* mplayInfo, struct MusicPlayerTrack* track); void MPlayMain(void); -void RealClearChain(void *x); - -void MPlayContinue(struct MusicPlayerInfo *mplayInfo); -void MPlayStart(struct MusicPlayerInfo *mplayInfo, struct SongHeader *songHeader); -void MPlayStop(struct MusicPlayerInfo *mplayInfo); -void FadeOutBody(struct MusicPlayerInfo *mplayInfo); -void TrkVolPitSet(struct MusicPlayerInfo *mplayInfo, struct MusicPlayerTrack *track); -void MPlayFadeOut(struct MusicPlayerInfo *mplayInfo, u16 speed); -void ClearChain(void *x); -void Clear64byte(void *addr); -void SoundInit(struct SoundInfo *soundInfo); -void MPlayExtender(struct CgbChannel *cgbChans); +void RealClearChain(void* x); + +void MPlayContinue(struct MusicPlayerInfo* mplayInfo); +void MPlayStart(struct MusicPlayerInfo* mplayInfo, struct SongHeader* songHeader); +void MPlayStop(struct MusicPlayerInfo* mplayInfo); +void FadeOutBody(struct MusicPlayerInfo* mplayInfo); +void TrkVolPitSet(struct MusicPlayerInfo* mplayInfo, struct MusicPlayerTrack* track); +void MPlayFadeOut(struct MusicPlayerInfo* mplayInfo, u16 speed); +void ClearChain(void* x); +void Clear64byte(void* addr); +void SoundInit(struct SoundInfo* soundInfo); +void MPlayExtender(struct CgbChannel* cgbChans); void m4aSoundMode(u32 mode); -void MPlayOpen(struct MusicPlayerInfo *mplayInfo, struct MusicPlayerTrack *track, u8 a3); +void MPlayOpen(struct MusicPlayerInfo* mplayInfo, struct MusicPlayerTrack* track, u8 a3); void CgbSound(void); void CgbOscOff(u8); u32 MidiKeyToCgbFreq(u8, u8, u8); void nullsub_141(void); -void MPlayJumpTableCopy(void **mplayJumpTable); +void MPlayJumpTableCopy(void** mplayJumpTable); void SampleFreqSet(u32 freq); void m4aSoundVSyncOn(void); void m4aSoundVSyncOff(void); -void m4aMPlayTempoControl(struct MusicPlayerInfo *mplayInfo, u16 tempo); -void m4aMPlayVolumeControl(struct MusicPlayerInfo *mplayInfo, u16 trackBits, u16 volume); -void m4aMPlayPitchControl(struct MusicPlayerInfo *mplayInfo, u16 trackBits, s16 pitch); -void m4aMPlayPanpotControl(struct MusicPlayerInfo *mplayInfo, u16 trackBits, s8 pan); -void ClearModM(struct MusicPlayerTrack *track); -void m4aMPlayModDepthSet(struct MusicPlayerInfo *mplayInfo, u16 trackBits, u8 modDepth); -void m4aMPlayLFOSpeedSet(struct MusicPlayerInfo *mplayInfo, u16 trackBits, u8 lfoSpeed); +void m4aMPlayTempoControl(struct MusicPlayerInfo* mplayInfo, u16 tempo); +void m4aMPlayVolumeControl(struct MusicPlayerInfo* mplayInfo, u16 trackBits, u16 volume); +void m4aMPlayPitchControl(struct MusicPlayerInfo* mplayInfo, u16 trackBits, s16 pitch); +void m4aMPlayPanpotControl(struct MusicPlayerInfo* mplayInfo, u16 trackBits, s8 pan); +void ClearModM(struct MusicPlayerTrack* track); +void m4aMPlayModDepthSet(struct MusicPlayerInfo* mplayInfo, u16 trackBits, u8 modDepth); +void m4aMPlayLFOSpeedSet(struct MusicPlayerInfo* mplayInfo, u16 trackBits, u8 lfoSpeed); // sound command handler functions -void ply_fine(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_goto(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_patt(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_pend(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_rept(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_memacc(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_prio(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_tempo(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_keysh(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_voice(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_vol(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_pan(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_bend(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_bendr(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_lfos(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_lfodl(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_mod(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_modt(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_tune(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_port(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xcmd(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_endtie(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_note(struct MusicPlayerInfo *, struct MusicPlayerTrack *); +void ply_fine(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_goto(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_patt(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_pend(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_rept(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_memacc(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_prio(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_tempo(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_keysh(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_voice(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_vol(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_pan(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_bend(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_bendr(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_lfos(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_lfodl(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_mod(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_modt(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_tune(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_port(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xcmd(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_endtie(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_note(struct MusicPlayerInfo*, struct MusicPlayerTrack*); // extended sound command handler functions -void ply_xxx(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xwave(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xtype(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xatta(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xdeca(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xsust(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xrele(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xiecv(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xiecl(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xleng(struct MusicPlayerInfo *, struct MusicPlayerTrack *); -void ply_xswee(struct MusicPlayerInfo *, struct MusicPlayerTrack *); +void ply_xxx(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xwave(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xtype(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xatta(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xdeca(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xsust(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xrele(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xiecv(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xiecl(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xleng(struct MusicPlayerInfo*, struct MusicPlayerTrack*); +void ply_xswee(struct MusicPlayerInfo*, struct MusicPlayerTrack*); #endif // GUARD_M4A_INTERNAL_H diff --git a/include/gba/macro.h b/include/gba/macro.h index cc853530..63043ebb 100644 --- a/include/gba/macro.h +++ b/include/gba/macro.h @@ -1,54 +1,49 @@ #ifndef GUARD_GBA_MACRO_H #define GUARD_GBA_MACRO_H -#define CPU_FILL(value, dest, size, bit) \ -{ \ - vu##bit tmp = (vu##bit)(value); \ - CpuSet((void *)&tmp, \ - dest, \ - CPU_SET_##bit##BIT | CPU_SET_SRC_FIXED | ((size)/(bit/8) & 0x1FFFFF)); \ -} +#define CPU_FILL(value, dest, size, bit) \ + { \ + vu##bit tmp = (vu##bit)(value); \ + CpuSet((void*)&tmp, dest, CPU_SET_##bit##BIT | CPU_SET_SRC_FIXED | ((size) / (bit / 8) & 0x1FFFFF)); \ + } #define CpuFill16(value, dest, size) CPU_FILL(value, dest, size, 16) #define CpuFill32(value, dest, size) CPU_FILL(value, dest, size, 32) -#define CPU_COPY(src, dest, size, bit) CpuSet(src, dest, CPU_SET_##bit##BIT | ((size)/(bit/8) & 0x1FFFFF)) +#define CPU_COPY(src, dest, size, bit) CpuSet(src, dest, CPU_SET_##bit##BIT | ((size) / (bit / 8) & 0x1FFFFF)) #define CpuCopy16(src, dest, size) CPU_COPY(src, dest, size, 16) #define CpuCopy32(src, dest, size) CPU_COPY(src, dest, size, 32) -#define CpuFastFill(value, dest, size) \ -{ \ - vu32 tmp = (vu32)(value); \ - CpuFastSet((void *)&tmp, \ - dest, \ - CPU_FAST_SET_SRC_FIXED | ((size)/(32/8) & 0x1FFFFF)); \ -} +#define CpuFastFill(value, dest, size) \ + { \ + vu32 tmp = (vu32)(value); \ + CpuFastSet((void*)&tmp, dest, CPU_FAST_SET_SRC_FIXED | ((size) / (32 / 8) & 0x1FFFFF)); \ + } #define CpuFastFill16(value, dest, size) CpuFastFill(((value) << 16) | (value), (dest), (size)) -#define CpuFastFill8(value, dest, size) CpuFastFill(((value) << 24) | ((value) << 16) | ((value) << 8) | (value), (dest), (size)) - -#define CpuFastCopy(src, dest, size) CpuFastSet(src, dest, ((size)/(32/8) & 0x1FFFFF)) - -#define DmaSet(dmaNum, src, dest, control) \ -{ \ - vu32 *dmaRegs = (vu32 *)REG_ADDR_DMA##dmaNum; \ - dmaRegs[0] = (vu32)(src); \ - dmaRegs[1] = (vu32)(dest); \ - dmaRegs[2] = (vu32)(control); \ - dmaRegs[2]; \ -} - -#define DMA_FILL(dmaNum, value, dest, size, bit) \ -{ \ - vu##bit tmp = (vu##bit)(value); \ - DmaSet(dmaNum, \ - &tmp, \ - dest, \ - (DMA_ENABLE | DMA_START_NOW | DMA_##bit##BIT | DMA_SRC_FIXED | DMA_DEST_INC) << 16 \ - | ((size)/(bit/8))); \ -} +#define CpuFastFill8(value, dest, size) \ + CpuFastFill(((value) << 24) | ((value) << 16) | ((value) << 8) | (value), (dest), (size)) + +#define CpuFastCopy(src, dest, size) CpuFastSet(src, dest, ((size) / (32 / 8) & 0x1FFFFF)) + +#define DmaSet(dmaNum, src, dest, control) \ + { \ + vu32* dmaRegs = (vu32*)REG_ADDR_DMA##dmaNum; \ + dmaRegs[0] = (vu32)(src); \ + dmaRegs[1] = (vu32)(dest); \ + dmaRegs[2] = (vu32)(control); \ + dmaRegs[2]; \ + } + +#define DMA_FILL(dmaNum, value, dest, size, bit) \ + { \ + vu##bit tmp = (vu##bit)(value); \ + DmaSet(dmaNum, &tmp, dest, \ + (DMA_ENABLE | DMA_START_NOW | DMA_##bit##BIT | DMA_SRC_FIXED | DMA_DEST_INC) << 16 | \ + ((size) / (bit / 8))); \ + } #define DmaFill16(dmaNum, value, dest, size) DMA_FILL(dmaNum, value, dest, size, 16) #define DmaFill32(dmaNum, value, dest, size) DMA_FILL(dmaNum, value, dest, size, 32) @@ -58,86 +53,77 @@ // unit size (2 or 4 bytes) and then combined with the DMA control flags using a // bitwise OR operation. -#define DMA_CLEAR(dmaNum, dest, size, bit) \ -{ \ - vu##bit *_dest = (vu##bit *)(dest); \ - u32 _size = size; \ - DmaFill##bit(dmaNum, 0, _dest, _size); \ -} +#define DMA_CLEAR(dmaNum, dest, size, bit) \ + { \ + vu##bit* _dest = (vu##bit*)(dest); \ + u32 _size = size; \ + DmaFill##bit(dmaNum, 0, _dest, _size); \ + } #define DmaClear16(dmaNum, dest, size) DMA_CLEAR(dmaNum, dest, size, 16) #define DmaClear32(dmaNum, dest, size) DMA_CLEAR(dmaNum, dest, size, 32) -#define DMA_COPY(dmaNum, src, dest, size, bit) \ - DmaSet(dmaNum, \ - src, \ - dest, \ - (DMA_ENABLE | DMA_START_NOW | DMA_##bit##BIT | DMA_SRC_INC | DMA_DEST_INC) << 16 \ - | ((size)/(bit/8))) +#define DMA_COPY(dmaNum, src, dest, size, bit) \ + DmaSet(dmaNum, src, dest, \ + (DMA_ENABLE | DMA_START_NOW | DMA_##bit##BIT | DMA_SRC_INC | DMA_DEST_INC) << 16 | ((size) / (bit / 8))) #define DmaCopy16(dmaNum, src, dest, size) DMA_COPY(dmaNum, src, dest, size, 16) #define DmaCopy32(dmaNum, src, dest, size) DMA_COPY(dmaNum, src, dest, size, 32) -#define DmaStop(dmaNum) \ -{ \ - vu16 *dmaRegs = (vu16 *)REG_ADDR_DMA##dmaNum; \ - dmaRegs[5] &= ~(DMA_START_MASK | DMA_DREQ_ON | DMA_REPEAT); \ - dmaRegs[5] &= ~DMA_ENABLE; \ - dmaRegs[5]; \ -} +#define DmaStop(dmaNum) \ + { \ + vu16* dmaRegs = (vu16*)REG_ADDR_DMA##dmaNum; \ + dmaRegs[5] &= ~(DMA_START_MASK | DMA_DREQ_ON | DMA_REPEAT); \ + dmaRegs[5] &= ~DMA_ENABLE; \ + dmaRegs[5]; \ + } #define DmaCopyLarge(dmaNum, src, dest, size, block, bit) \ -{ \ - const void *_src = src; \ - void *_dest = dest; \ - u32 _size = size; \ - while (1) \ { \ - DmaCopy##bit(dmaNum, _src, _dest, (block)); \ - _src += (block); \ - _dest += (block); \ - _size -= (block); \ - if (_size <= (block)) \ - { \ - DmaCopy##bit(dmaNum, _src, _dest, _size); \ - break; \ + const void* _src = src; \ + void* _dest = dest; \ + u32 _size = size; \ + while (1) { \ + DmaCopy##bit(dmaNum, _src, _dest, (block)); \ + _src += (block); \ + _dest += (block); \ + _size -= (block); \ + if (_size <= (block)) { \ + DmaCopy##bit(dmaNum, _src, _dest, _size); \ + break; \ + } \ } \ - } \ -} - -#define DmaClearLarge(dmaNum, dest, size, block, bit) \ -{ \ - void *_dest = dest; \ - u32 _size = size; \ - while (1) \ - { \ - DmaFill##bit(dmaNum, 0, _dest, (block)); \ - _dest += (block); \ - _size -= (block); \ - if (_size <= (block)) \ - { \ - DmaFill##bit(dmaNum, 0, _dest, _size); \ - break; \ - } \ - } \ -} + } + +#define DmaClearLarge(dmaNum, dest, size, block, bit) \ + { \ + void* _dest = dest; \ + u32 _size = size; \ + while (1) { \ + DmaFill##bit(dmaNum, 0, _dest, (block)); \ + _dest += (block); \ + _size -= (block); \ + if (_size <= (block)) { \ + DmaFill##bit(dmaNum, 0, _dest, _size); \ + break; \ + } \ + } \ + } #define DmaFillLarge(dmaNum, value, dest, size, block, bit) \ -{ \ - void *_dest = (void *)dest; \ - u32 _size = size; \ - while (1) \ { \ - DmaFill##bit(dmaNum, value, _dest, (block)); \ - _dest += (block); \ - _size -= (block); \ - if (_size <= (block)) \ - { \ - DmaFill##bit(dmaNum, value, _dest, _size); \ - break; \ + void* _dest = (void*)dest; \ + u32 _size = size; \ + while (1) { \ + DmaFill##bit(dmaNum, value, _dest, (block)); \ + _dest += (block); \ + _size -= (block); \ + if (_size <= (block)) { \ + DmaFill##bit(dmaNum, value, _dest, _size); \ + break; \ + } \ } \ - } \ -} + } #define DmaCopyLarge16(dmaNum, src, dest, size, block) DmaCopyLarge(dmaNum, src, dest, size, block, 16) @@ -151,44 +137,44 @@ #define DmaClearLarge32(dmaNum, dest, size, block) DmaClearLarge(dmaNum, dest, size, block, 32) #define DmaCopyDefvars(dmaNum, src, dest, size, bit) \ -{ \ - const void *_src = src; \ - void *_dest = dest; \ - u32 _size = size; \ - DmaCopy##bit(dmaNum, _src, _dest, _size); \ -} + { \ + const void* _src = src; \ + void* _dest = dest; \ + u32 _size = size; \ + DmaCopy##bit(dmaNum, _src, _dest, _size); \ + } #define DmaCopy16Defvars(dmaNum, src, dest, size) DmaCopyDefvars(dmaNum, src, dest, size, 16) #define DmaCopy32Defvars(dmaNum, src, dest, size) DmaCopyDefvars(dmaNum, src, dest, size, 32) #define DmaFillDefvars(dmaNum, value, dest, size, bit) \ -{ \ - void *_dest = (void *)dest; \ - u32 _size = size; \ - DmaFill##bit(dmaNum, value, _dest, _size); \ -} + { \ + void* _dest = (void*)dest; \ + u32 _size = size; \ + DmaFill##bit(dmaNum, value, _dest, _size); \ + } #define DmaFill16Defvars(dmaNum, value, dest, size) DmaFillDefvars(dmaNum, value, dest, size, 16) #define DmaFill32Defvars(dmaNum, value, dest, size) DmaFillDefvars(dmaNum, value, dest, size, 32) #define DmaClearDefvars(dmaNum, dest, size, bit) \ -{ \ - void *_dest = dest; \ - u32 _size = size; \ - DmaClear##bit(dmaNum, _dest, _size); \ -} + { \ + void* _dest = dest; \ + u32 _size = size; \ + DmaClear##bit(dmaNum, _dest, _size); \ + } #define DmaClear16Defvars(dmaNum, dest, size) DmaClearDefvars(dmaNum, dest, size, 16) #define DmaClear32Defvars(dmaNum, dest, size) DmaClearDefvars(dmaNum, dest, size, 32) -#define IntrEnable(flags) \ -{ \ - u16 imeTemp; \ - \ - imeTemp = REG_IME; \ - REG_IME = 0; \ - REG_IE |= flags; \ - REG_IME = imeTemp; \ -} +#define IntrEnable(flags) \ + { \ + u16 imeTemp; \ + \ + imeTemp = REG_IME; \ + REG_IME = 0; \ + REG_IE |= flags; \ + REG_IME = imeTemp; \ + } #endif // GUARD_GBA_MACRO_H diff --git a/include/gba/multi_boot.h b/include/gba/multi_boot.h index 0f825e71..6aa5a2f6 100644 --- a/include/gba/multi_boot.h +++ b/include/gba/multi_boot.h @@ -1,40 +1,39 @@ #ifndef GUARD_GBA_MULTI_BOOT_H #define GUARD_GBA_MULTI_BOOT_H -#define MULTIBOOT_NCHILD 3 // Maximum number of slaves -#define MULTIBOOT_HEADER_SIZE 0xc0 // Header size +#define MULTIBOOT_NCHILD 3 // Maximum number of slaves +#define MULTIBOOT_HEADER_SIZE 0xc0 // Header size #define MULTIBOOT_SEND_SIZE_MIN 0x100 // Minimum transmission size #define MULTIBOOT_SEND_SIZE_MAX 0x40000 // Maximum transmission size -struct MultiBootParam -{ - u32 system_work[5]; // Can be rewritten within system call. - // Used with library also. - u8 handshake_data; // Handshake data from client +struct MultiBootParam { + u32 system_work[5]; // Can be rewritten within system call. + // Used with library also. + u8 handshake_data; // Handshake data from client u8 padding; - u16 handshake_timeout; // Handshake timeout check counter - u8 probe_count; // If not 0, during client recognition or - // boot program transfer - u8 client_data[MULTIBOOT_NCHILD]; // Handshake data from client - u8 palette_data; // Palette's flashing parameter during load - // for client - u8 response_bit; // When high probability that slave - // connected, 4P-2P: d3-d1 is 1. - u8 client_bit; // For slave distinguished as client, - // 4P-2P: d3-d1 is 1. - u8 reserved1; // Reserved - const u8 *boot_srcp; // Boot program start (after header) - const u8 *boot_endp; // Boot program end pointer - const u8 *masterp; // Pointer to header referenced and output - // by master - u8 *reserved2[MULTIBOOT_NCHILD]; // Reserved - u32 system_work2[4]; // Can be rewritten within system call. - u8 sendflag; // If SC7=1 and during send, not 0 - u8 probe_target_bit; // If target recognized with client, - // 4P-2P: d3-d1 is 1. - u8 check_wait; // Wait frame until recoginition with client - u8 server_type; // client recognize method 0= Low Speed - // 1= High Speed + u16 handshake_timeout; // Handshake timeout check counter + u8 probe_count; // If not 0, during client recognition or + // boot program transfer + u8 client_data[MULTIBOOT_NCHILD]; // Handshake data from client + u8 palette_data; // Palette's flashing parameter during load + // for client + u8 response_bit; // When high probability that slave + // connected, 4P-2P: d3-d1 is 1. + u8 client_bit; // For slave distinguished as client, + // 4P-2P: d3-d1 is 1. + u8 reserved1; // Reserved + const u8* boot_srcp; // Boot program start (after header) + const u8* boot_endp; // Boot program end pointer + const u8* masterp; // Pointer to header referenced and output + // by master + u8* reserved2[MULTIBOOT_NCHILD]; // Reserved + u32 system_work2[4]; // Can be rewritten within system call. + u8 sendflag; // If SC7=1 and during send, not 0 + u8 probe_target_bit; // If target recognized with client, + // 4P-2P: d3-d1 is 1. + u8 check_wait; // Wait frame until recoginition with client + u8 server_type; // client recognize method 0= Low Speed + // 1= High Speed }; /* Error Code @@ -46,30 +45,30 @@ struct MultiBootParam * "Slave is not connected." * "Cannot recognize the slave." * ,etc. Messages easy for the player to understand are good. - * NO_PROBE_TARGET: When recognizing client all machines returned + * NO_PROBE_TARGET: When recognizing client all machines returned * abnormal data and there is no target. - * NO_DLREADY: client did not return a download preparations + * NO_DLREADY: client did not return a download preparations * possible message. * BOOT_FAILURE: MultiBoot() system call returned an error. - * HANDSHAKE_FAILURE: Failed to do handshake with master which should + * HANDSHAKE_FAILURE: Failed to do handshake with master which should * occur immediately after boot of slave. - * (Slave may be in infinite loop, request that power be turned off + * (Slave may be in infinite loop, request that power be turned off * and on again.) */ -#define MULTIBOOT_ERROR_04 0x04 -#define MULTIBOOT_ERROR_08 0x08 -#define MULTIBOOT_ERROR_0c 0x0c -#define MULTIBOOT_ERROR_40 0x40 -#define MULTIBOOT_ERROR_44 0x44 -#define MULTIBOOT_ERROR_48 0x48 -#define MULTIBOOT_ERROR_4c 0x4c -#define MULTIBOOT_ERROR_80 0x80 -#define MULTIBOOT_ERROR_84 0x84 -#define MULTIBOOT_ERROR_88 0x88 -#define MULTIBOOT_ERROR_8c 0x8c -#define MULTIBOOT_ERROR_NO_PROBE_TARGET 0x50 -#define MULTIBOOT_ERROR_NO_DLREADY 0x60 -#define MULTIBOOT_ERROR_BOOT_FAILURE 0x70 +#define MULTIBOOT_ERROR_04 0x04 +#define MULTIBOOT_ERROR_08 0x08 +#define MULTIBOOT_ERROR_0c 0x0c +#define MULTIBOOT_ERROR_40 0x40 +#define MULTIBOOT_ERROR_44 0x44 +#define MULTIBOOT_ERROR_48 0x48 +#define MULTIBOOT_ERROR_4c 0x4c +#define MULTIBOOT_ERROR_80 0x80 +#define MULTIBOOT_ERROR_84 0x84 +#define MULTIBOOT_ERROR_88 0x88 +#define MULTIBOOT_ERROR_8c 0x8c +#define MULTIBOOT_ERROR_NO_PROBE_TARGET 0x50 +#define MULTIBOOT_ERROR_NO_DLREADY 0x60 +#define MULTIBOOT_ERROR_BOOT_FAILURE 0x70 #define MULTIBOOT_ERROR_HANDSHAKE_FAILURE 0x71 /* After an error, or when a value other than 0xffff is returned, @@ -83,22 +82,22 @@ struct MultiBootParam #define MULTIBOOT_CONNECTION_CHECK_WAIT 15 /* Recognition of Slave - * Value set in MultiBootParam structure member server_type + * Value set in MultiBootParam structure member server_type * MULTIBOOT_SERVER_TYPE_NORMAL: Slow speed recognition mode * The MultiBootMain() function communicates 2 bytes with one call. - * Therefore, processing returns from MultiBootMain() function + * Therefore, processing returns from MultiBootMain() function * in short time. * MULTIBOOT_SERVER_TYPE_QUICK: High speed recognition mode * In MultiBootMain() function as many consecutive communications * are done as possible. - * Therefore, processing may not return from MultiBootMain() for + * Therefore, processing may not return from MultiBootMain() for * several dozen frames. - * During this time, there is no problem if processing for sound and - * display cannot be done. If processing for sound and display is + * During this time, there is no problem if processing for sound and + * display cannot be done. If processing for sound and display is * done with timer interrupt processing, you can use. */ #define MULTIBOOT_SERVER_TYPE_NORMAL 0 -#define MULTIBOOT_SERVER_TYPE_QUICK 1 +#define MULTIBOOT_SERVER_TYPE_QUICK 1 /* Timeout for slave's final start up check 400 frames */ #define MULTIBOOT_HANDSHAKE_TIMEOUT 400 diff --git a/include/gba/syscall.h b/include/gba/syscall.h index 22fdf09f..dc528ffe 100644 --- a/include/gba/syscall.h +++ b/include/gba/syscall.h @@ -1,15 +1,15 @@ #ifndef GUARD_GBA_SYSCALL_H #define GUARD_GBA_SYSCALL_H -#define RESET_EWRAM 0x01 -#define RESET_IWRAM 0x02 -#define RESET_PALETTE 0x04 -#define RESET_VRAM 0x08 -#define RESET_OAM 0x10 -#define RESET_SIO_REGS 0x20 +#define RESET_EWRAM 0x01 +#define RESET_IWRAM 0x02 +#define RESET_PALETTE 0x04 +#define RESET_VRAM 0x08 +#define RESET_OAM 0x10 +#define RESET_SIO_REGS 0x20 #define RESET_SOUND_REGS 0x40 -#define RESET_REGS 0x80 -#define RESET_ALL 0xFF +#define RESET_REGS 0x80 +#define RESET_ALL 0xFF void SoftReset(u32 resetFlags); @@ -22,28 +22,28 @@ u16 Sqrt(u32 num); u16 ArcTan2(s16 x, s16 y); #define CPU_SET_SRC_FIXED 0x01000000 -#define CPU_SET_16BIT 0x00000000 -#define CPU_SET_32BIT 0x04000000 +#define CPU_SET_16BIT 0x00000000 +#define CPU_SET_32BIT 0x04000000 -void CpuSet(const void *src, void *dest, u32 control); +void CpuSet(const void* src, void* dest, u32 control); #define CPU_FAST_SET_SRC_FIXED 0x01000000 -void CpuFastSet(const void *src, void *dest, u32 control); +void CpuFastSet(const void* src, void* dest, u32 control); -void BgAffineSet(struct BgAffineSrcData *src, struct BgAffineDstData *dest, s32 count); +void BgAffineSet(struct BgAffineSrcData* src, struct BgAffineDstData* dest, s32 count); -void ObjAffineSet(struct ObjAffineSrcData *src, void *dest, s32 count, s32 offset); +void ObjAffineSet(struct ObjAffineSrcData* src, void* dest, s32 count, s32 offset); -void LZ77UnCompWram(const void *src, void *dest); +void LZ77UnCompWram(const void* src, void* dest); -void LZ77UnCompVram(const void *src, void *dest); +void LZ77UnCompVram(const void* src, void* dest); -void RLUnCompWram(const void *src, void *dest); +void RLUnCompWram(const void* src, void* dest); -void RLUnCompVram(const void *src, void *dest); +void RLUnCompVram(const void* src, void* dest); -int MultiBoot(struct MultiBootParam *mp); +int MultiBoot(struct MultiBootParam* mp); s32 Div(s32 num, s32 denom); diff --git a/include/gba/types.h b/include/gba/types.h index 2ed9aa63..4f4136ed 100644 --- a/include/gba/types.h +++ b/include/gba/types.h @@ -3,119 +3,115 @@ #include <stdint.h> -typedef uint8_t u8; +typedef uint8_t u8; typedef uint16_t u16; typedef uint32_t u32; typedef uint64_t u64; -typedef int8_t s8; -typedef int16_t s16; -typedef int32_t s32; -typedef int64_t s64; +typedef int8_t s8; +typedef int16_t s16; +typedef int32_t s32; +typedef int64_t s64; -typedef volatile u8 vu8; +typedef volatile u8 vu8; typedef volatile u16 vu16; typedef volatile u32 vu32; typedef volatile u64 vu64; -typedef volatile s8 vs8; +typedef volatile s8 vs8; typedef volatile s16 vs16; typedef volatile s32 vs32; typedef volatile s64 vs64; -typedef float f32; +typedef float f32; typedef double f64; -typedef u8 bool8; +typedef u8 bool8; typedef u16 bool16; typedef u32 bool32; -struct BgCnt -{ - u16 priority:2; - u16 charBaseBlock:2; - u16 dummy:2; - u16 mosaic:1; - u16 palettes:1; - u16 screenBaseBlock:5; - u16 areaOverflowMode:1; - u16 screenSize:2; +struct BgCnt { + u16 priority : 2; + u16 charBaseBlock : 2; + u16 dummy : 2; + u16 mosaic : 1; + u16 palettes : 1; + u16 screenBaseBlock : 5; + u16 areaOverflowMode : 1; + u16 screenSize : 2; }; typedef volatile struct BgCnt vBgCnt; -struct PlttData -{ - u16 r:5; // red - u16 g:5; // green - u16 b:5; // blue - u16 unused_15:1; +struct PlttData { + u16 r : 5; // red + u16 g : 5; // green + u16 b : 5; // blue + u16 unused_15 : 1; }; -struct OamData -{ - /*0x00*/ u32 y:8; - /*0x01*/ u32 affineMode:2; // 0x1, 0x2 -> 0x4 - u32 objMode:2; // 0x4, 0x8 -> 0xC - u32 mosaic:1; // 0x10 - u32 bpp:1; // 0x20 - u32 shape:2; // 0x40, 0x80 -> 0xC0 - - /*0x02*/ u32 x:9; - u32 matrixNum:5; // bits 3/4 are h-flip/v-flip if not in affine mode - u32 size:2; // 0x4000, 0x8000 -> 0xC000 - - /*0x04*/ u16 tileNum:10; // 0x3FF - u16 priority:2; // 0x400, 0x800 -> 0xC00 - u16 paletteNum:4; +struct OamData { + /*0x00*/ u32 y : 8; + /*0x01*/ u32 affineMode : 2; // 0x1, 0x2 -> 0x4 + u32 objMode : 2; // 0x4, 0x8 -> 0xC + u32 mosaic : 1; // 0x10 + u32 bpp : 1; // 0x20 + u32 shape : 2; // 0x40, 0x80 -> 0xC0 + + /*0x02*/ u32 x : 9; + u32 matrixNum : 5; // bits 3/4 are h-flip/v-flip if not in affine mode + u32 size : 2; // 0x4000, 0x8000 -> 0xC000 + + /*0x04*/ u16 tileNum : 10; // 0x3FF + u16 priority : 2; // 0x400, 0x800 -> 0xC00 + u16 paletteNum : 4; /*0x06*/ u16 affineParam; }; -#define ST_OAM_HFLIP 0x08 -#define ST_OAM_VFLIP 0x10 +#define ST_OAM_HFLIP 0x08 +#define ST_OAM_VFLIP 0x10 #define ST_OAM_MNUM_FLIP_MASK 0x18 #define ST_OAM_OBJ_NORMAL 0 -#define ST_OAM_OBJ_BLEND 1 +#define ST_OAM_OBJ_BLEND 1 #define ST_OAM_OBJ_WINDOW 2 -#define ST_OAM_AFFINE_OFF 0 +#define ST_OAM_AFFINE_OFF 0 #define ST_OAM_AFFINE_NORMAL 1 -#define ST_OAM_AFFINE_ERASE 2 +#define ST_OAM_AFFINE_ERASE 2 #define ST_OAM_AFFINE_DOUBLE 3 -#define ST_OAM_AFFINE_ON_MASK 1 +#define ST_OAM_AFFINE_ON_MASK 1 #define ST_OAM_AFFINE_DOUBLE_MASK 2 #define ST_OAM_4BPP 0 #define ST_OAM_8BPP 1 -#define ST_OAM_SQUARE 0 +#define ST_OAM_SQUARE 0 #define ST_OAM_H_RECTANGLE 1 #define ST_OAM_V_RECTANGLE 2 -#define ST_OAM_SIZE_0 0 -#define ST_OAM_SIZE_1 1 -#define ST_OAM_SIZE_2 2 -#define ST_OAM_SIZE_3 3 +#define ST_OAM_SIZE_0 0 +#define ST_OAM_SIZE_1 1 +#define ST_OAM_SIZE_2 2 +#define ST_OAM_SIZE_3 3 -#define SPRITE_SIZE_8x8 ((ST_OAM_SIZE_0 << 2) | (ST_OAM_SQUARE)) -#define SPRITE_SIZE_16x16 ((ST_OAM_SIZE_1 << 2) | (ST_OAM_SQUARE)) -#define SPRITE_SIZE_32x32 ((ST_OAM_SIZE_2 << 2) | (ST_OAM_SQUARE)) -#define SPRITE_SIZE_64x64 ((ST_OAM_SIZE_3 << 2) | (ST_OAM_SQUARE)) +#define SPRITE_SIZE_8x8 ((ST_OAM_SIZE_0 << 2) | (ST_OAM_SQUARE)) +#define SPRITE_SIZE_16x16 ((ST_OAM_SIZE_1 << 2) | (ST_OAM_SQUARE)) +#define SPRITE_SIZE_32x32 ((ST_OAM_SIZE_2 << 2) | (ST_OAM_SQUARE)) +#define SPRITE_SIZE_64x64 ((ST_OAM_SIZE_3 << 2) | (ST_OAM_SQUARE)) -#define SPRITE_SIZE_16x8 ((ST_OAM_SIZE_0 << 2) | (ST_OAM_H_RECTANGLE)) -#define SPRITE_SIZE_32x8 ((ST_OAM_SIZE_1 << 2) | (ST_OAM_H_RECTANGLE)) -#define SPRITE_SIZE_32x16 ((ST_OAM_SIZE_2 << 2) | (ST_OAM_H_RECTANGLE)) -#define SPRITE_SIZE_64x32 ((ST_OAM_SIZE_3 << 2) | (ST_OAM_H_RECTANGLE)) +#define SPRITE_SIZE_16x8 ((ST_OAM_SIZE_0 << 2) | (ST_OAM_H_RECTANGLE)) +#define SPRITE_SIZE_32x8 ((ST_OAM_SIZE_1 << 2) | (ST_OAM_H_RECTANGLE)) +#define SPRITE_SIZE_32x16 ((ST_OAM_SIZE_2 << 2) | (ST_OAM_H_RECTANGLE)) +#define SPRITE_SIZE_64x32 ((ST_OAM_SIZE_3 << 2) | (ST_OAM_H_RECTANGLE)) -#define SPRITE_SIZE_8x16 ((ST_OAM_SIZE_0 << 2) | (ST_OAM_V_RECTANGLE)) -#define SPRITE_SIZE_8x32 ((ST_OAM_SIZE_1 << 2) | (ST_OAM_V_RECTANGLE)) -#define SPRITE_SIZE_16x32 ((ST_OAM_SIZE_2 << 2) | (ST_OAM_V_RECTANGLE)) -#define SPRITE_SIZE_32x64 ((ST_OAM_SIZE_3 << 2) | (ST_OAM_V_RECTANGLE)) +#define SPRITE_SIZE_8x16 ((ST_OAM_SIZE_0 << 2) | (ST_OAM_V_RECTANGLE)) +#define SPRITE_SIZE_8x32 ((ST_OAM_SIZE_1 << 2) | (ST_OAM_V_RECTANGLE)) +#define SPRITE_SIZE_16x32 ((ST_OAM_SIZE_2 << 2) | (ST_OAM_V_RECTANGLE)) +#define SPRITE_SIZE_32x64 ((ST_OAM_SIZE_3 << 2) | (ST_OAM_V_RECTANGLE)) -#define SPRITE_SIZE(dim) ((SPRITE_SIZE_##dim >> 2) & 0x03) +#define SPRITE_SIZE(dim) ((SPRITE_SIZE_##dim >> 2) & 0x03) #define SPRITE_SHAPE(dim) (SPRITE_SIZE_##dim & 0x03) -struct BgAffineSrcData -{ +struct BgAffineSrcData { s32 texX; s32 texY; s16 scrX; @@ -125,8 +121,7 @@ struct BgAffineSrcData u16 alpha; }; -struct BgAffineDstData -{ +struct BgAffineDstData { s16 pa; s16 pb; s16 pc; @@ -135,134 +130,127 @@ struct BgAffineDstData s32 dy; }; -struct ObjAffineSrcData -{ +struct ObjAffineSrcData { s16 xScale; s16 yScale; u16 rotation; }; // Normal SIO Control Structure -struct SioNormalCnt -{ - u16 sck_I_O:1; // Clock I/O Select - u16 sck:1; // Internal Clock Select - u16 ackRecv:1; // Transfer Enable Flag Receive - u16 ackSend:1; // Transfer Enable Flag Send - u16 unused_6_4:3; - u16 enable:1; // SIO Enable - u16 unused_11_8:4; - u16 mode:2; // Communication Mode Select - u16 ifEnable:1; // Interrupt Request Enable - u16 unused_15:1; - u8 data; // Data - u8 unused_31_24; +struct SioNormalCnt { + u16 sck_I_O : 1; // Clock I/O Select + u16 sck : 1; // Internal Clock Select + u16 ackRecv : 1; // Transfer Enable Flag Receive + u16 ackSend : 1; // Transfer Enable Flag Send + u16 unused_6_4 : 3; + u16 enable : 1; // SIO Enable + u16 unused_11_8 : 4; + u16 mode : 2; // Communication Mode Select + u16 ifEnable : 1; // Interrupt Request Enable + u16 unused_15 : 1; + u8 data; // Data + u8 unused_31_24; }; -#define ST_SIO_8BIT_MODE 0 // Normal 8-bit communication mode -#define ST_SIO_32BIT_MODE 1 // Normal 32-bit communication mode +#define ST_SIO_8BIT_MODE 0 // Normal 8-bit communication mode +#define ST_SIO_32BIT_MODE 1 // Normal 32-bit communication mode -#define ST_SIO_SCK_OUT 0 // Select external clock -#define ST_SIO_SCK_IN 1 // Select internal clock -#define ST_SIO_IN_SCK_256K 0 // Select internal clock 256KHz -#define ST_SIO_IN_SCK_2M 1 // Select 2MHz +#define ST_SIO_SCK_OUT 0 // Select external clock +#define ST_SIO_SCK_IN 1 // Select internal clock +#define ST_SIO_IN_SCK_256K 0 // Select internal clock 256KHz +#define ST_SIO_IN_SCK_2M 1 // Select 2MHz // Multi-player SIO Control Structure -struct SioMultiCnt -{ - u16 baudRate:2; // baud rate - u16 si:1; // SI terminal - u16 sd:1; // SD terminal - u16 id:2; // ID - u16 error:1; // error flag - u16 enable:1; // SIO enable - u16 unused_11_8:4; - u16 mode:2; // communication mode (should equal 2) - u16 ifEnable:1; // IRQ enable - u16 unused_15:1; - u16 data; // data +struct SioMultiCnt { + u16 baudRate : 2; // baud rate + u16 si : 1; // SI terminal + u16 sd : 1; // SD terminal + u16 id : 2; // ID + u16 error : 1; // error flag + u16 enable : 1; // SIO enable + u16 unused_11_8 : 4; + u16 mode : 2; // communication mode (should equal 2) + u16 ifEnable : 1; // IRQ enable + u16 unused_15 : 1; + u16 data; // data }; -#define ST_SIO_MULTI_MODE 2 // Multi-play communication mode +#define ST_SIO_MULTI_MODE 2 // Multi-play communication mode -#define ST_SIO_9600_BPS 0 // Baud rate 9600 bps -#define ST_SIO_38400_BPS 1 // 38400 bps -#define ST_SIO_57600_BPS 2 // 57600 bps -#define ST_SIO_115200_BPS 3 // 115200 bps -#define ST_SIO_MULTI_PARENT 1 // Multi-play communication Connect master -#define ST_SIO_MULTI_CHILD 0 // Connect slave +#define ST_SIO_9600_BPS 0 // Baud rate 9600 bps +#define ST_SIO_38400_BPS 1 // 38400 bps +#define ST_SIO_57600_BPS 2 // 57600 bps +#define ST_SIO_115200_BPS 3 // 115200 bps +#define ST_SIO_MULTI_PARENT 1 // Multi-play communication Connect master +#define ST_SIO_MULTI_CHILD 0 // Connect slave // UART - SIO Control Structure -struct SioUartCnt -{ - u16 baudRate:2; // Baud Rate - u16 ctsEnable:1; // Send Signal Enable - u16 paritySelect:1; // Parity Even/Odd - u16 transDataFull:1; // Transmit Data Full - u16 recvDataEmpty:1; // Receive Data Empty - u16 error:1; // Error Detect - u16 length:1; // Data Length - u16 fifoEnable:1; // FIFO Enable - u16 parityEnable:1; // Parity Enable - u16 transEnable:1; // Transmitter Enable - u16 recvEnable:1; // Receiver Enable - u16 mode:2; // Communication Mode Select - u16 ifEnable:1; // Interrupt Request Enable - u16 unused_15:1; - u8 data; // Data - u8 unused_31_24; +struct SioUartCnt { + u16 baudRate : 2; // Baud Rate + u16 ctsEnable : 1; // Send Signal Enable + u16 paritySelect : 1; // Parity Even/Odd + u16 transDataFull : 1; // Transmit Data Full + u16 recvDataEmpty : 1; // Receive Data Empty + u16 error : 1; // Error Detect + u16 length : 1; // Data Length + u16 fifoEnable : 1; // FIFO Enable + u16 parityEnable : 1; // Parity Enable + u16 transEnable : 1; // Transmitter Enable + u16 recvEnable : 1; // Receiver Enable + u16 mode : 2; // Communication Mode Select + u16 ifEnable : 1; // Interrupt Request Enable + u16 unused_15 : 1; + u8 data; // Data + u8 unused_31_24; }; -#define ST_SIO_UART_MODE 3 // UART communication mode +#define ST_SIO_UART_MODE 3 // UART communication mode -#define ST_SIO_UART_7BIT 0 // UART communication data length 7 bits -#define ST_SIO_UART_8BIT 1 // 8 bits -#define ST_SIO_PARITY_EVEN 0 // Even parity -#define ST_SIO_PARITY_ODD 1 // Odd parity +#define ST_SIO_UART_7BIT 0 // UART communication data length 7 bits +#define ST_SIO_UART_8BIT 1 // 8 bits +#define ST_SIO_PARITY_EVEN 0 // Even parity +#define ST_SIO_PARITY_ODD 1 // Odd parity // JOY Bus Communication Control Structure -struct JoyCnt -{ - u8 ifReset:1; // JOY Bus Reset Interrupt Request - u8 ifRecv:1; // JOY Bus Received Interrupt Request - u8 ifSend:1; // JOY Bus Sent Interrupt Request - u8 unused_5_3:3; - u8 ifEnable:1; // Interrupt Request Enable - u8 unused_7:1; +struct JoyCnt { + u8 ifReset : 1; // JOY Bus Reset Interrupt Request + u8 ifRecv : 1; // JOY Bus Received Interrupt Request + u8 ifSend : 1; // JOY Bus Sent Interrupt Request + u8 unused_5_3 : 3; + u8 ifEnable : 1; // Interrupt Request Enable + u8 unused_7 : 1; }; // JOY Bus Communication Status Structure -struct JoyStat -{ - u8 unused_0:1; - u8 recv:1; // Receive Status - u8 unused_2:1; - u8 send:1; // Send Status - u8 flags:2; // General Flag - u8 unused_7_6:2; +struct JoyStat { + u8 unused_0 : 1; + u8 recv : 1; // Receive Status + u8 unused_2 : 1; + u8 send : 1; // Send Status + u8 flags : 2; // General Flag + u8 unused_7_6 : 2; }; // General Input/Output Control Structure -struct RCnt -{ - u8 sc:1; // Data - u8 sd:1; - u8 si:1; - u8 so:1; - u8 sc_i_o:1; // I/O Select - u8 sd_i_o:1; - u8 si_i_o:1; - u8 so_i_o:1; - u8 ifEnable:1; // Interrupt Request Enable - u8 unused_13_9:5; - u8 sioModeMaster:2; // SIO Mode Master +struct RCnt { + u8 sc : 1; // Data + u8 sd : 1; + u8 si : 1; + u8 so : 1; + u8 sc_i_o : 1; // I/O Select + u8 sd_i_o : 1; + u8 si_i_o : 1; + u8 so_i_o : 1; + u8 ifEnable : 1; // Interrupt Request Enable + u8 unused_13_9 : 5; + u8 sioModeMaster : 2; // SIO Mode Master }; -#define ST_R_SIO_MASTER_MODE 0 // SIO master mode -#define ST_R_DIRECT_MODE 2 // General input/output communication mode -#define ST_R_JOY_MODE 3 // JOY communication mode +#define ST_R_SIO_MASTER_MODE 0 // SIO master mode +#define ST_R_DIRECT_MODE 2 // General input/output communication mode +#define ST_R_JOY_MODE 3 // JOY communication mode -#define ST_R_IN 0 // Select input -#define ST_R_OUT 1 // Select output +#define ST_R_IN 0 // Select input +#define ST_R_OUT 1 // Select output #endif // GUARD_GBA_TYPES_H diff --git a/include/global.h b/include/global.h index 5e1677ca..13f67e6e 100644 --- a/include/global.h +++ b/include/global.h @@ -11,15 +11,16 @@ #define asm_comment(x) asm volatile("@ -- " x " -- ") #define asm_unified(x) asm(".syntax unified\n" x "\n.syntax divided") -#if defined (__APPLE__) || defined (__CYGWIN__) +#if defined(__APPLE__) || defined(__CYGWIN__) // Get the IDE to stfu // We define it this way to fool preproc. -#define INCBIN(...) {0} -#define INCBIN_U8 INCBIN +#define INCBIN(...) \ + { 0 } +#define INCBIN_U8 INCBIN #define INCBIN_U16 INCBIN #define INCBIN_U32 INCBIN -#define INCBIN_S8 INCBIN +#define INCBIN_S8 INCBIN #define INCBIN_S16 INCBIN #define INCBIN_S32 INCBIN #define _(x) (x) @@ -28,20 +29,20 @@ #define ARRAY_COUNT(array) (sizeof(array) / sizeof((array)[0])) -#define SWAP(a, b, temp) \ -{ \ - temp = a; \ - a = b; \ - b = temp; \ -} +#define SWAP(a, b, temp) \ + { \ + temp = a; \ + a = b; \ + b = temp; \ + } // useful math macros // Converts a number to Q8.8 fixed-point format -#define Q_8_8(n) ((s16)((n) * 256)) +#define Q_8_8(n) ((s16)((n)*256)) // Converts a number to Q4.12 fixed-point format -#define Q_4_12(n) ((s16)((n) * 4096)) +#define Q_4_12(n) ((s16)((n)*4096)) #define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) >= (b) ? (a) : (b)) diff --git a/include/greatFairy.h b/include/greatFairy.h index 77762242..073f6a37 100644 --- a/include/greatFairy.h +++ b/include/greatFairy.h @@ -2,10 +2,10 @@ #define GREATFAIRY_H extern u32 __modsi3(u32, u32); -extern void InitializeAnimation(Entity *, u32); +extern void InitializeAnimation(Entity*, u32); extern void sub_08087380(); extern u32 CheckRoomFlag(); -extern Entity *sub_080873AC(Entity*, u32, u32); +extern Entity* sub_080873AC(Entity*, u32, u32); extern void PositionRelative(); extern void CopyPosition(); extern void DoFade(); @@ -19,19 +19,19 @@ extern void sub_080045D4(); extern void sub_0806F69C(); extern u32 Random(); -extern void (*gGreatFairy[11])(Entity *); -extern void (*gGreatFairyBehaviors[6])(Entity *); -extern void (*gGreatFairyWings[3])(Entity *); -extern void (*gGreatFairyWake[2])(Entity *); -extern void (*gGreatFairyMini[3])(Entity *); -extern void (*gGreatFairyMiniAnim[3])(Entity *); -extern void (*gGreatFairyDrip[2])(Entity *); -extern void (*gGreatFairyRipple[2])(Entity *); -extern void (*gGreatFairyBigRipple[2])(Entity *); -extern void (*gGreatFairyEnergy[2])(Entity *); -extern void (*gGreatFairyInteract1[4])(Entity *); -extern void (*gGreatFairyInteract2[5])(Entity *); -extern void (*gUnk_081207A4[2])(Entity *); +extern void (*gGreatFairy[11])(Entity*); +extern void (*gGreatFairyBehaviors[6])(Entity*); +extern void (*gGreatFairyWings[3])(Entity*); +extern void (*gGreatFairyWake[2])(Entity*); +extern void (*gGreatFairyMini[3])(Entity*); +extern void (*gGreatFairyMiniAnim[3])(Entity*); +extern void (*gGreatFairyDrip[2])(Entity*); +extern void (*gGreatFairyRipple[2])(Entity*); +extern void (*gGreatFairyBigRipple[2])(Entity*); +extern void (*gGreatFairyEnergy[2])(Entity*); +extern void (*gGreatFairyInteract1[4])(Entity*); +extern void (*gGreatFairyInteract2[5])(Entity*); +extern void (*gUnk_081207A4[2])(Entity*); extern u32 gUnk_0810C2E4; extern RoomControls gRoomControls; diff --git a/include/item.h b/include/item.h index 4ef90ee3..74e207c3 100644 --- a/include/item.h +++ b/include/item.h @@ -4,8 +4,8 @@ #define ITEM_H /* On hold until naming conflicts are resolved */ -/* - enum +/* + enum { Untyped, SmithSword = 0x01, @@ -127,15 +127,15 @@ LongSpin = 0x75 } ItemType; */ - typedef struct { - u8 unk; - u8 behaviorID; - u8 unk2; - u8 unk3; - u8 stateID; - u8 filler[4]; - u8 unk4; - u8 filler2[4]; - u8 unk5; - } ItemBehavior; +typedef struct { + u8 unk; + u8 behaviorID; + u8 unk2; + u8 unk3; + u8 stateID; + u8 filler[4]; + u8 unk4; + u8 filler2[4]; + u8 unk5; +} ItemBehavior; #endif
\ No newline at end of file diff --git a/include/link.h b/include/link.h index 3050756a..a8a02bdf 100644 --- a/include/link.h +++ b/include/link.h @@ -5,64 +5,64 @@ #include "entity.h" typedef struct { - u8 filler[2]; - u8 jumpStatus; - u8 filler2[2]; - u8 heldObject; - u8 pushedObject; - u8 unk; - u16 unk2; - u8 unk3; - u8 keepFacing; - u8 linkAction; - u8 filler3[2]; - u8 hurtBlinkSpeed; - u8 filler4[4]; - u16 filler5[3]; - u8 filler6[8]; - u16 filler7[2]; - u8 swimState; - u8 filler8[5]; - u8 *unk4; + u8 filler[2]; + u8 jumpStatus; + u8 filler2[2]; + u8 heldObject; + u8 pushedObject; + u8 unk; + u16 unk2; + u8 unk3; + u8 keepFacing; + u8 linkAction; + u8 filler3[2]; + u8 hurtBlinkSpeed; + u8 filler4[4]; + u16 filler5[3]; + u8 filler6[8]; + u16 filler7[2]; + u8 swimState; + u8 filler8[5]; + u8* unk4; union { u32 all; - struct { - u32 filler9:3; - u32 noMinishCap:1; - u32 pullingState:1; - u32 windyState:1; - u32 filler10:4; - u32 slipperyState:1; - u32 filler11:5; - u32 filler11b:16; - } PACKED b; + struct { + u32 filler9 : 3; + u32 noMinishCap : 1; + u32 pullingState : 1; + u32 windyState : 1; + u32 filler10 : 4; + u32 slipperyState : 1; + u32 filler11 : 5; + u32 filler11b : 16; + } PACKED b; } flags; - u8 filler12[6]; - u16 unk5; - u8 filler13[2]; - u8 swordGoldParticle:1; - u8 swordBlueParticle:1; - u8 filler14:6; - u8 unk6; - u8 filler15[75]; - u8 unk7; + u8 filler12[6]; + u16 unk5; + u8 filler13[2]; + u8 swordGoldParticle : 1; + u8 swordBlueParticle : 1; + u8 filler14 : 6; + u8 unk6; + u8 filler15[75]; + u8 unk7; } LinkState; typedef struct { - u8 walletType; - u8 heartPieces; - u8 health; - u8 maxHealth; - u8 bombCount; - u8 arrowCount; - u8 bombBagType; - u8 quiverType; - u8 filler[4]; - u8 itemOnA; - u8 itemonB; - u8 filler2[10]; - u16 rupees; - u8 filler3[12]; + u8 walletType; + u8 heartPieces; + u8 health; + u8 maxHealth; + u8 bombCount; + u8 arrowCount; + u8 bombBagType; + u8 quiverType; + u8 filler[4]; + u8 itemOnA; + u8 itemonB; + u8 filler2[10]; + u16 rupees; + u8 filler3[12]; } Stats; extern LinkState gLinkState; diff --git a/include/main.h b/include/main.h index 3414c9c3..61c3f6ae 100644 --- a/include/main.h +++ b/include/main.h @@ -1,17 +1,17 @@ #ifndef MAIN_H #define MAIN_H -typedef struct { //0x03001000 - u8 field_0x0; - u8 field_0x1; - u8 field_0x2; - u8 field_0x3; - u8 field_0x4; - u16 field_0x6; - u8 field_0x8; - u8 field_0x9; - u8 field_0xa; - u8 field_0xb; - u32 ticks; +typedef struct { // 0x03001000 + u8 field_0x0; + u8 field_0x1; + u8 field_0x2; + u8 field_0x3; + u8 field_0x4; + u16 field_0x6; + u8 field_0x8; + u8 field_0x9; + u8 field_0xa; + u8 field_0xb; + u32 ticks; } MainStruct; extern s32 sub_08055F70(); diff --git a/include/menu.h b/include/menu.h index b1f799b7..5ff44751 100644 --- a/include/menu.h +++ b/include/menu.h @@ -8,12 +8,12 @@ typedef struct { u8 transitionType; u8 unk4; u8 state; - u8 unk6; - u8 unk7; - u8 unk8; + u8 unk6; + u8 unk7; + u8 unk8; u16 unk2; u16 fadeInTime; - u8 filler2 [4]; + u8 filler2[4]; u32 filler3[3]; } Menu; diff --git a/include/readKeyInput.h b/include/readKeyInput.h index 3fe77ce6..27114243 100644 --- a/include/readKeyInput.h +++ b/include/readKeyInput.h @@ -1,9 +1,9 @@ struct Input { - u16 unk0; - u16 unk1; - u16 unk2; - u8 unk3; - u8 unk4; + u16 unk0; + u16 unk1; + u16 unk2; + u8 unk3; + u8 unk4; }; -//void ReadKeyInput(void); +// void ReadKeyInput(void); diff --git a/include/room.h b/include/room.h index ed8fc8ff..6345e352 100644 --- a/include/room.h +++ b/include/room.h @@ -6,8 +6,8 @@ /* typedef struct { - u8 areaID; - u8 roomID; + u8 areaID; + u8 roomID; } RoomID; */ @@ -15,34 +15,34 @@ typedef struct { u16 unk2; u8 unk3; u8 unk4; - u8 areaID; - u8 roomID; + u8 areaID; + u8 roomID; u16 roomOriginX; - u16 roomOriginY; - s16 roomScrollX; - s16 roomScrollY; - u8 unk5; + u16 roomOriginY; + s16 roomScrollX; + s16 roomScrollY; + u8 unk5; u8 unk6; u8 filler[4]; - u8 screenShakeMagnitude; - u8 unk7; - u16 screenShakeTime; - u16 filler2[6]; - u8 filler3[4]; - u16 filler4[4]; - Entity * cameraTarget; + u8 screenShakeMagnitude; + u8 unk7; + u16 screenShakeTime; + u16 filler2[6]; + u8 filler3[4]; + u16 filler4[4]; + Entity* cameraTarget; } RoomControls; typedef struct { - u8 filler[6]; - u8 itemForSaleIndex; - u16 unk; - u8 unk2; - u16 filler2[3]; - u8 filler3[4]; - u8 filler4[52]; - u8 filler5[28]; - u32 greatFairyState; + u8 filler[6]; + u8 itemForSaleIndex; + u16 unk; + u8 unk2; + u16 filler2[3]; + u8 filler3[4]; + u8 filler4[52]; + u8 filler5[28]; + u32 greatFairyState; } RoomVars; extern RoomControls gRoomControls; diff --git a/include/screen.h b/include/screen.h index a2c0ba5f..3c732093 100644 --- a/include/screen.h +++ b/include/screen.h @@ -4,67 +4,67 @@ #include "global.h" typedef struct { - u16 lcdControl2; - u32 unk; - u16 lcdControl1; + u16 lcdControl2; + u32 unk; + u16 lcdControl1; } LcdControls; typedef struct { - u16 bg0Control; - u16 bg0xOffset; - u16 bg0yOffset; - u16 bg0Updated; - u32 unk; + u16 bg0Control; + u16 bg0xOffset; + u16 bg0yOffset; + u16 bg0Updated; + u32 unk; } BgSettings; typedef struct { - u16 bg2Control; - u16 bg2xOffset; - u16 bg2yOffset; - u16 unk; - u32 unk2; - u16 bg3Control; - u16 bg3xOffset; - u16 bg3yOffset; - u16 unk4; - u32 unk5; + u16 bg2Control; + u16 bg2xOffset; + u16 bg2yOffset; + u16 unk; + u32 unk2; + u16 bg3Control; + u16 bg3xOffset; + u16 bg3yOffset; + u16 unk4; + u32 unk5; } BgAffSettings; typedef struct { - u16 bg2dx; - u16 bg2dmx; - u16 bg2dy; - u16 bg2dmy; - u16 bg2xPointLeastSig; - u16 bg2xPointMostSig; - u16 bg2yPointLeastSig; - u16 bg2yPointMostSig; - u16 bg3dx; - u16 bg3dmx; - u16 bg3dy; - u16 bg3dmy; - u16 bg3xPointLeastSig; - u16 bg3xPointMostSig; - u16 bg3yPointLeastSig; - u16 bg3yPointMostSig; - u16 window0HorizontalDimensions; - u16 window1HorizontalDimensions; - u16 window0VerticalDimensions; - u16 window1VerticalDimensions; - u16 windowInsideControl; - u16 windowOutsideControl; - u16 mosaicSize; - u16 layerFXControl; - u16 alphaBlend; - u16 layerBrightness; + u16 bg2dx; + u16 bg2dmx; + u16 bg2dy; + u16 bg2dmy; + u16 bg2xPointLeastSig; + u16 bg2xPointMostSig; + u16 bg2yPointLeastSig; + u16 bg2yPointMostSig; + u16 bg3dx; + u16 bg3dmx; + u16 bg3dy; + u16 bg3dmy; + u16 bg3xPointLeastSig; + u16 bg3xPointMostSig; + u16 bg3yPointLeastSig; + u16 bg3yPointMostSig; + u16 window0HorizontalDimensions; + u16 window1HorizontalDimensions; + u16 window0VerticalDimensions; + u16 window1VerticalDimensions; + u16 windowInsideControl; + u16 windowOutsideControl; + u16 mosaicSize; + u16 layerFXControl; + u16 alphaBlend; + u16 layerBrightness; } BgControls; typedef struct { - LcdControls lcd; - BgSettings bg1; - BgSettings bg2; - BgAffSettings affine; - BgControls controls; + LcdControls lcd; + BgSettings bg1; + BgSettings bg2; + BgAffSettings affine; + BgControls controls; } Screen; #endif
\ No newline at end of file diff --git a/include/textbox.h b/include/textbox.h index dbc11020..a25e0723 100644 --- a/include/textbox.h +++ b/include/textbox.h @@ -4,16 +4,16 @@ #include "global.h" typedef struct { - u8 doTextBox; - u8 unk; - u8 textSpeed; - u8 unk3; //HI? - u8 textWindowWidth; - u8 textWindowHeight; - u8 textWindowPosX; - u8 textWindowPosY; - u16 textIndex; - u16 unk2; //HI? + u8 doTextBox; + u8 unk; + u8 textSpeed; + u8 unk3; // HI? + u8 textWindowWidth; + u8 textWindowHeight; + u8 textWindowPosX; + u8 textWindowPosY; + u16 textIndex; + u16 unk2; // HI? } TextBox; extern TextBox gTextBox; |