summaryrefslogtreecommitdiff
path: root/asm/init
diff options
context:
space:
mode:
authorTakaRikka <38417346+TakaRikka@users.noreply.github.com>2022-12-19 11:06:32 -0800
committerGitHub <noreply@github.com>2022-12-19 12:06:32 -0700
commitca71275bbecc7db9a4eeca3a6ac4215b66de4318 (patch)
treec2851f8cec211216fe0cb6a31a0260a62fc3bf53 /asm/init
parent1114b13da81ab0b52fd4bb56a32f32331a21e581 (diff)
big d_a_alink pass (#214)
* d_a_alink pass1 wip * more d_a_alink work * remove asm * more daalink work * 20% dol code decompiled * fixed some nonmatchings for building * a few daalink functions and labeling some HIO data
Diffstat (limited to 'asm/init')
-rw-r--r--asm/init/__flush_cache.s15
-rw-r--r--asm/init/__init_hardware.s10
-rw-r--r--asm/init/__init_registers.s37
-rw-r--r--asm/init/__start.s98
4 files changed, 0 insertions, 160 deletions
diff --git a/asm/init/__flush_cache.s b/asm/init/__flush_cache.s
deleted file mode 100644
index 4db8f4ecc6..0000000000
--- a/asm/init/__flush_cache.s
+++ /dev/null
@@ -1,15 +0,0 @@
-lbl_80003424:
-/* 80003424 3C A0 FF FF */ lis r5, 0xFFFF /* 0xFFFFFFF1@h */
-/* 80003428 60 A5 FF F1 */ ori r5, r5, 0xFFF1 /* 0xFFFFFFF1@l */
-/* 8000342C 7C A5 18 38 */ and r5, r5, r3
-/* 80003430 7C 65 18 50 */ subf r3, r5, r3
-/* 80003434 7C 84 1A 14 */ add r4, r4, r3
-lbl_80003438:
-/* 80003438 7C 00 28 6C */ dcbst 0, r5
-/* 8000343C 7C 00 04 AC */ sync
-/* 80003440 7C 00 2F AC */ icbi 0, r5
-/* 80003444 30 A5 00 08 */ addic r5, r5, 8
-/* 80003448 34 84 FF F8 */ addic. r4, r4, -8
-/* 8000344C 40 80 FF EC */ bge lbl_80003438
-/* 80003450 4C 00 01 2C */ isync
-/* 80003454 4E 80 00 20 */ blr
diff --git a/asm/init/__init_hardware.s b/asm/init/__init_hardware.s
deleted file mode 100644
index aed5e07e2b..0000000000
--- a/asm/init/__init_hardware.s
+++ /dev/null
@@ -1,10 +0,0 @@
-lbl_80003400:
-/* 80003400 7C 00 00 A6 */ mfmsr r0
-/* 80003404 60 00 20 00 */ ori r0, r0, 0x2000
-/* 80003408 7C 00 01 24 */ mtmsr r0
-/* 8000340C 7F E8 02 A6 */ mflr r31
-/* 80003410 48 33 73 FD */ bl __OSPSInit
-/* 80003414 48 33 69 C1 */ bl __OSFPRInit
-/* 80003418 48 33 86 D9 */ bl __OSCacheInit
-/* 8000341C 7F E8 03 A6 */ mtlr r31
-/* 80003420 4E 80 00 20 */ blr
diff --git a/asm/init/__init_registers.s b/asm/init/__init_registers.s
deleted file mode 100644
index 638d815523..0000000000
--- a/asm/init/__init_registers.s
+++ /dev/null
@@ -1,37 +0,0 @@
-lbl_800032B0:
-/* 800032B0 38 00 00 00 */ li r0, 0
-/* 800032B4 38 60 00 00 */ li r3, 0
-/* 800032B8 38 80 00 00 */ li r4, 0
-/* 800032BC 38 A0 00 00 */ li r5, 0
-/* 800032C0 38 C0 00 00 */ li r6, 0
-/* 800032C4 38 E0 00 00 */ li r7, 0
-/* 800032C8 39 00 00 00 */ li r8, 0
-/* 800032CC 39 20 00 00 */ li r9, 0
-/* 800032D0 39 40 00 00 */ li r10, 0
-/* 800032D4 39 60 00 00 */ li r11, 0
-/* 800032D8 39 80 00 00 */ li r12, 0
-/* 800032DC 39 C0 00 00 */ li r14, 0
-/* 800032E0 39 E0 00 00 */ li r15, 0
-/* 800032E4 3A 00 00 00 */ li r16, 0
-/* 800032E8 3A 20 00 00 */ li r17, 0
-/* 800032EC 3A 40 00 00 */ li r18, 0
-/* 800032F0 3A 60 00 00 */ li r19, 0
-/* 800032F4 3A 80 00 00 */ li r20, 0
-/* 800032F8 3A A0 00 00 */ li r21, 0
-/* 800032FC 3A C0 00 00 */ li r22, 0
-/* 80003300 3A E0 00 00 */ li r23, 0
-/* 80003304 3B 00 00 00 */ li r24, 0
-/* 80003308 3B 20 00 00 */ li r25, 0
-/* 8000330C 3B 40 00 00 */ li r26, 0
-/* 80003310 3B 60 00 00 */ li r27, 0
-/* 80003314 3B 80 00 00 */ li r28, 0
-/* 80003318 3B A0 00 00 */ li r29, 0
-/* 8000331C 3B C0 00 00 */ li r30, 0
-/* 80003320 3B E0 00 00 */ li r31, 0
-/* 80003324 3C 20 80 45 */ lis r1, _stack_end+0x1000@h /* 0x80457BC8@h */
-/* 80003328 60 21 7B C8 */ ori r1, r1, _stack_end+0x1000@l /* 0x80457BC8@l */
-/* 8000332C 3C 40 80 45 */ lis r2, _SDA2_BASE_@h /* 0x80459A00@h */
-/* 80003330 60 42 9A 00 */ ori r2, r2, _SDA2_BASE_@l /* 0x80459A00@l */
-/* 80003334 3D A0 80 45 */ lis r13, _SDA_BASE_@h /* 0x80458580@h */
-/* 80003338 61 AD 85 80 */ ori r13, r13, _SDA_BASE_@l /* 0x80458580@l */
-/* 8000333C 4E 80 00 20 */ blr
diff --git a/asm/init/__start.s b/asm/init/__start.s
deleted file mode 100644
index 84528f2eef..0000000000
--- a/asm/init/__start.s
+++ /dev/null
@@ -1,98 +0,0 @@
-lbl_80003154:
-/* 80003154 48 00 01 5D */ bl __init_registers
-/* 80003158 48 00 02 A9 */ bl __init_hardware
-/* 8000315C 38 00 FF FF */ li r0, -1
-/* 80003160 94 21 FF F8 */ stwu r1, -8(r1)
-/* 80003164 90 01 00 04 */ stw r0, 4(r1)
-/* 80003168 90 01 00 00 */ stw r0, 0(r1)
-/* 8000316C 48 00 01 D5 */ bl __init_data
-/* 80003170 38 00 00 00 */ li r0, 0
-/* 80003174 3C C0 80 00 */ lis r6, 0x8000 /* 0x80000044@ha */
-/* 80003178 38 C6 00 44 */ addi r6, r6, 0x0044 /* 0x80000044@l */
-/* 8000317C 90 06 00 00 */ stw r0, 0(r6)
-/* 80003180 3C C0 80 00 */ lis r6, 0x8000 /* 0x800000F4@ha */
-/* 80003184 38 C6 00 F4 */ addi r6, r6, 0x00F4 /* 0x800000F4@l */
-/* 80003188 80 C6 00 00 */ lwz r6, 0(r6)
-/* 8000318C 28 06 00 00 */ cmplwi r6, 0
-/* 80003190 41 82 00 0C */ beq lbl_8000319C
-/* 80003194 80 E6 00 0C */ lwz r7, 0xc(r6)
-/* 80003198 48 00 00 24 */ b lbl_800031BC
-lbl_8000319C:
-/* 8000319C 3C A0 80 00 */ lis r5, 0x8000 /* 0x80000034@ha */
-/* 800031A0 38 A5 00 34 */ addi r5, r5, 0x0034 /* 0x80000034@l */
-/* 800031A4 80 A5 00 00 */ lwz r5, 0(r5)
-/* 800031A8 28 05 00 00 */ cmplwi r5, 0
-/* 800031AC 41 82 00 4C */ beq lbl_800031F8
-/* 800031B0 3C E0 80 00 */ lis r7, 0x8000 /* 0x800030E8@ha */
-/* 800031B4 38 E7 30 E8 */ addi r7, r7, 0x30E8 /* 0x800030E8@l */
-/* 800031B8 80 E7 00 00 */ lwz r7, 0(r7)
-lbl_800031BC:
-/* 800031BC 38 A0 00 00 */ li r5, 0
-/* 800031C0 28 07 00 02 */ cmplwi r7, 2
-/* 800031C4 41 82 00 24 */ beq lbl_800031E8
-/* 800031C8 28 07 00 03 */ cmplwi r7, 3
-/* 800031CC 38 A0 00 01 */ li r5, 1
-/* 800031D0 41 82 00 18 */ beq lbl_800031E8
-/* 800031D4 28 07 00 04 */ cmplwi r7, 4
-/* 800031D8 40 82 00 20 */ bne lbl_800031F8
-/* 800031DC 38 A0 00 02 */ li r5, 2
-/* 800031E0 4B FF FF 61 */ bl __set_debug_bba
-/* 800031E4 48 00 00 14 */ b lbl_800031F8
-lbl_800031E8:
-/* 800031E8 3C C0 80 37 */ lis r6, InitMetroTRK@ha /* 0x80371560@ha */
-/* 800031EC 38 C6 15 60 */ addi r6, r6, InitMetroTRK@l /* 0x80371560@l */
-/* 800031F0 7C C8 03 A6 */ mtlr r6
-/* 800031F4 4E 80 00 21 */ blrl
-lbl_800031F8:
-/* 800031F8 3C C0 80 00 */ lis r6, 0x8000 /* 0x800000F4@ha */
-/* 800031FC 38 C6 00 F4 */ addi r6, r6, 0x00F4 /* 0x800000F4@l */
-/* 80003200 80 A6 00 00 */ lwz r5, 0(r6)
-/* 80003204 28 05 00 00 */ cmplwi r5, 0
-/* 80003208 41 A2 00 50 */ beq+ lbl_80003258
-/* 8000320C 80 C5 00 08 */ lwz r6, 8(r5)
-/* 80003210 28 06 00 00 */ cmplwi r6, 0
-/* 80003214 41 A2 00 44 */ beq+ lbl_80003258
-/* 80003218 7C C5 32 14 */ add r6, r5, r6
-/* 8000321C 81 C6 00 00 */ lwz r14, 0(r6)
-/* 80003220 28 0E 00 00 */ cmplwi r14, 0
-/* 80003224 41 82 00 34 */ beq lbl_80003258
-/* 80003228 39 E6 00 04 */ addi r15, r6, 4
-/* 8000322C 7D C9 03 A6 */ mtctr r14
-lbl_80003230:
-/* 80003230 38 C6 00 04 */ addi r6, r6, 4
-/* 80003234 80 E6 00 00 */ lwz r7, 0(r6)
-/* 80003238 7C E7 2A 14 */ add r7, r7, r5
-/* 8000323C 90 E6 00 00 */ stw r7, 0(r6)
-/* 80003240 42 00 FF F0 */ bdnz lbl_80003230
-/* 80003244 3C A0 80 00 */ lis r5, 0x8000 /* 0x80000034@ha */
-/* 80003248 38 A5 00 34 */ addi r5, r5, 0x0034 /* 0x80000034@l */
-/* 8000324C 55 E7 00 34 */ rlwinm r7, r15, 0, 0, 0x1a
-/* 80003250 90 E5 00 00 */ stw r7, 0(r5)
-/* 80003254 48 00 00 0C */ b lbl_80003260
-lbl_80003258:
-/* 80003258 39 C0 00 00 */ li r14, 0
-/* 8000325C 39 E0 00 00 */ li r15, 0
-lbl_80003260:
-/* 80003260 48 34 31 39 */ bl DBInit
-/* 80003264 48 33 6C FD */ bl OSInit
-/* 80003268 3C 80 80 00 */ lis r4, 0x8000 /* 0x800030E6@ha */
-/* 8000326C 38 84 30 E6 */ addi r4, r4, 0x30E6 /* 0x800030E6@l */
-/* 80003270 A0 64 00 00 */ lhz r3, 0(r4)
-/* 80003274 70 65 80 00 */ andi. r5, r3, 0x8000
-/* 80003278 41 82 00 10 */ beq lbl_80003288
-/* 8000327C 70 63 7F FF */ andi. r3, r3, 0x7fff
-/* 80003280 28 03 00 01 */ cmplwi r3, 1
-/* 80003284 40 82 00 08 */ bne lbl_8000328C
-lbl_80003288:
-/* 80003288 4B FF FE 79 */ bl __check_pad3
-lbl_8000328C:
-/* 8000328C 4B FF FE C1 */ bl __get_debug_bba
-/* 80003290 28 03 00 01 */ cmplwi r3, 1
-/* 80003294 40 82 00 08 */ bne lbl_8000329C
-/* 80003298 48 36 E3 61 */ bl InitMetroTRK_BBA
-lbl_8000329C:
-/* 8000329C 48 33 F8 DD */ bl __init_user
-/* 800032A0 7D C3 73 78 */ mr r3, r14
-/* 800032A4 7D E4 7B 78 */ mr r4, r15
-/* 800032A8 48 00 31 AD */ bl main
-/* 800032AC 48 35 F7 20 */ b exit