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| author | Ryan Houdek <Sonicadvance1@gmail.com> | 2015-09-01 17:10:53 -0500 |
|---|---|---|
| committer | Ryan Houdek <Sonicadvance1@gmail.com> | 2015-09-04 19:41:54 -0500 |
| commit | 791c7d5a845658e98a73c5be261c8ecda277a9dc (patch) | |
| tree | ff9f7139930d656063b73806f10c9c3225936b0c /Source/Core/VideoBackends/OGL/ProgramShaderCache.cpp | |
| parent | 2c68f6bfc591d159cd132e851bd43ce0e7f038aa (diff) | |
[AArch64] Clean up bogus vector FCVT{N,L} instruction usage.
Replace the instruction with the scalar variant FCVT instruction.
FCVT{N,L} 8 cycles latency on the Cortex A57
FCVT has five cycle latency and slightly higher throughput
On the A72 all three of these instructions will have three cycle latency,
While FCVT{N,L} will have half the throughput.
Diffstat (limited to 'Source/Core/VideoBackends/OGL/ProgramShaderCache.cpp')
0 files changed, 0 insertions, 0 deletions