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authorScott Mansell <phiren@gmail.com>2016-08-24 00:22:24 +1200
committerGitHub <noreply@github.com>2016-08-24 00:22:24 +1200
commit92f165d75693e54285294bb666f33d003d1ab174 (patch)
treee54f4a6b48a7eecbd75811d3936426449ab6d5cf /Source/Core
parent52af0770c352e5d599f8a95c2c9d2fe98b265418 (diff)
parentcc7aa730816ddfac5a88c3acea2c581b28358c75 (diff)
Merge pull request #4144 from aldelaro5/debugger-insertInstruction-fix
Invalidate the icache when inserting a nop or a BLR
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/Debugger/PPCDebugInterface.cpp1
-rw-r--r--Source/Core/Core/PowerPC/PowerPC.cpp19
-rw-r--r--Source/Core/Core/PowerPC/PowerPC.h1
3 files changed, 21 insertions, 0 deletions
diff --git a/Source/Core/Core/Debugger/PPCDebugInterface.cpp b/Source/Core/Core/Debugger/PPCDebugInterface.cpp
index 4356c27d9f..b9a4a2f03d 100644
--- a/Source/Core/Core/Debugger/PPCDebugInterface.cpp
+++ b/Source/Core/Core/Debugger/PPCDebugInterface.cpp
@@ -163,6 +163,7 @@ void PPCDebugInterface::ToggleMemCheck(unsigned int address)
void PPCDebugInterface::InsertBLR(unsigned int address, unsigned int value)
{
PowerPC::HostWrite_U32(value, address);
+ PowerPC::ScheduleInvalidateCacheThreadSafe(address);
}
// =======================================================
diff --git a/Source/Core/Core/PowerPC/PowerPC.cpp b/Source/Core/Core/PowerPC/PowerPC.cpp
index 172ce0c36c..68b21ab0e0 100644
--- a/Source/Core/Core/PowerPC/PowerPC.cpp
+++ b/Source/Core/Core/PowerPC/PowerPC.cpp
@@ -10,6 +10,7 @@
#include "Common/MathUtil.h"
#include "Core/ConfigManager.h"
+#include "Core/CoreTiming.h"
#include "Core/HW/CPU.h"
#include "Core/HW/Memmap.h"
#include "Core/HW/SystemTimers.h"
@@ -35,6 +36,12 @@ BreakPoints breakpoints;
MemChecks memchecks;
PPCDebugInterface debug_interface;
+static int s_invalidate_cache_thread_safe;
+static void InvalidateCacheThreadSafe(u64 userdata, s64 cyclesLate)
+{
+ ppcState.iCache.Invalidate(static_cast<u32>(userdata));
+}
+
u32 CompactCR()
{
u32 new_cr = 0;
@@ -117,6 +124,9 @@ void Init(int cpu_core)
// Changing the rounding mode has a limited effect.
FPURoundMode::SetPrecisionMode(FPURoundMode::PREC_53);
+ s_invalidate_cache_thread_safe =
+ CoreTiming::RegisterEvent("invalidateEmulatedCache", InvalidateCacheThreadSafe);
+
memset(ppcState.sr, 0, sizeof(ppcState.sr));
ppcState.pagetable_base = 0;
ppcState.pagetable_hashmask = 0;
@@ -173,6 +183,15 @@ void Init(int cpu_core)
breakpoints.ClearAllTemporary();
}
+void ScheduleInvalidateCacheThreadSafe(u32 address)
+{
+ if (CPU::GetState() == CPU::State::CPU_RUNNING)
+ CoreTiming::ScheduleEvent(0, s_invalidate_cache_thread_safe, address,
+ CoreTiming::FromThread::NON_CPU);
+ else
+ PowerPC::ppcState.iCache.Invalidate(static_cast<u32>(address));
+}
+
void Shutdown()
{
InjectExternalCPUCore(nullptr);
diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h
index 98d281e851..29b1b8496b 100644
--- a/Source/Core/Core/PowerPC/PowerPC.h
+++ b/Source/Core/Core/PowerPC/PowerPC.h
@@ -138,6 +138,7 @@ extern PPCDebugInterface debug_interface;
void Init(int cpu_core);
void Shutdown();
void DoState(PointerWrap& p);
+void ScheduleInvalidateCacheThreadSafe(u32 address);
CoreMode GetMode();
// [NOT THREADSAFE] CPU Thread or CPU::PauseAndLock or CORE_UNINITIALIZED